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git01.mediatek.com / filogic / atf / 344ca9d20f69c6f03b6829fecb2092fcc753e94c / plat / nvidia / tegra / include / t194
  1. 508d20d Tegra: platform specific BL31_SIZE by anzhou · Tue Jul 21 16:22:44 2020 +0800
  2. a7b3f0f Tegra194: remove unused tegra_mc_defs header by Varun Wadekar · Thu Oct 24 15:02:11 2019 -0700
  3. 41eac8a Tegra: sip: add VPR resize enabled check by Anthony Zhou · Wed Dec 04 14:58:23 2019 +0800
  4. 3118cbf Tegra194: verify firewall settings before resource use by Kalyani Chidambaram Vaidyanathan · Wed Oct 02 13:57:23 2019 -0700
  5. c14ae53 Tegra194: ras: verbose prints for SErrors by David Pu · Thu May 16 17:20:27 2019 -0700
  6. 70f6597 Tegra194: add RAS exception handling by David Pu · Mon Mar 18 15:14:49 2019 -0700
  7. 7534c20 Tegra194: move cluster and CPU counter to header file. by Anthony Zhou · Mon Mar 11 15:50:32 2019 +0800
  8. 75c9443 Tegra: smmu: remove context save sequence by Pritesh Raithatha · Fri Aug 03 15:48:15 2018 +0530
  9. e55c27b Tegra: bpmp: fixup TEGRA_CLK_SE values for Tegra186/Tegra194 by Varun Wadekar · Thu Sep 13 08:47:43 2018 -0700
  10. dbcc95c Tegra194: add SE support to generate SHA256 of TZRAM by Jeetesh Burman · Fri Jul 06 20:03:38 2018 +0530
  11. 254b57d Tegra194: store TZDRAM base/size to scratch registers by Jeetesh Burman · Fri Jul 06 19:58:30 2018 +0530
  12. 1b0c124 Tegra: per-SoC DRAM base values by Varun Wadekar · Tue May 15 11:24:59 2018 -0700
  13. 602cf7e Tegra194: enable driver for general purpose DMA engine by Varun Wadekar · Tue Apr 03 13:10:48 2018 -0700
  14. 03aa014 Tegra194: organize the memory/mmio map to make it linear by Varun Wadekar · Tue Jan 23 14:51:40 2018 -0800
  15. 08ac273 Tegra194: support for boot params wider than 32-bits by Steven Kao · Fri Feb 09 21:35:20 2018 +0800
  16. 1654e1c Tegra194: memctrl: set reorder depth limit for PCIE blocks by Puneet Saxena · Wed Mar 07 14:06:30 2018 +0530
  17. 5b526df Tegra194: memctrl: update mss reprogramming as HW PROD settings by Puneet Saxena · Fri Jan 05 07:04:35 2018 -0800
  18. 919e0e2 Tegra194: memctrl: Disable PVARDC coalescer by Arto Merilainen · Thu Jan 18 19:47:36 2018 +0200
  19. e579606 Tegra194: toggle SE clock during context save/restore by steven kao · Tue Jan 02 19:09:04 2018 -0800
  20. 3d8d2ab Tegra194: memctrl: force viw and vifalr/w transactions as non-coherent by Krishna Reddy · Fri Dec 22 20:17:09 2017 -0800
  21. a1673b3 Tegra194: memctrl: fix bug in client order id reg value generation by Krishna Reddy · Sun Dec 17 16:21:47 2017 -0800
  22. 45ea689 Tegra194: memctrl: enable mc coalescer by Pritesh Raithatha · Mon Dec 18 23:00:05 2017 -0800
  23. 150d033 Tegra194: update scratch registers used to read boot parameters by steven kao · Sat Dec 23 17:58:58 2017 -0800
  24. 2909fa3 Tegra: include: fix violations of MISRA Rule 21.1 by Varun Wadekar · Thu Jan 09 08:52:10 2020 -0800
  25. 8a45c72 Tegra194: introduce tegra_mc_def.h by Pritesh Raithatha · Fri Dec 15 15:00:09 2017 -0800
  26. 0e6dce6 Tegra194: 40-bit wide memory address space by Steven Kao · Fri Feb 09 21:01:49 2018 +0800
  27. 0f174f1 Tegra194: add support to reset GPU by Jeetesh Burman · Mon Jan 22 16:52:11 2018 +0530
  28. b2b4305 Tegra194: memctrl: fix logic to check TZDRAM config register access by Steven Kao · Thu Nov 30 11:53:29 2017 +0800
  29. 9d15f7e Tegra: introduce plat_enable_console() by Varun Wadekar · Wed Aug 21 14:01:31 2019 -0700
  30. ee93ed1 Tegra194: memctrl: platform handler for TZDRAM setup by Steven Kao · Tue Nov 14 19:12:58 2017 +0800
  31. da865de Tegra194: save system suspend entry marker to TZDRAM by Varun Wadekar · Fri Nov 10 13:27:29 2017 -0800
  32. e0c222f Tegra194: helper functions for CPU rst handler and SMMU ctx offset by Varun Wadekar · Fri Nov 10 13:23:34 2017 -0800
  33. 362a6b2 Tegra194: cleanup references to Tegra186 by Varun Wadekar · Fri Nov 10 11:04:42 2017 -0800
  34. 530b217 Tegra194: drivers: SE and RNG1/PKA1 context save support by Steven Kao · Fri Jun 23 16:18:58 2017 +0800
  35. 4607f17 Tegra194: rename secure scratch register macros by Steven Kao · Mon Oct 23 18:35:14 2017 +0800
  36. 8bf6d4e Tegra194: fix defects flagged by MISRA scan by Anthony Zhou · Wed Sep 20 17:44:43 2017 +0800
  37. 1719707 Tegra194: remove the GPU reset register macro by Steven Kao · Fri Oct 13 10:28:29 2017 +0800
  38. 4309d7b Tegra194: MC registers to allow CPU accesses to TZRAM by Varun Wadekar · Tue Oct 03 15:25:44 2017 -0700
  39. 128f46a Tegra194: memctrl: platform handlers to reprogram MSS by Varun Wadekar · Thu Oct 24 16:06:12 2019 -0700
  40. 86d3a2b Tegra194: correct the TEGRA_CAR_RESET_BASE macro value by Steven Kao · Thu Aug 31 13:35:01 2017 +0800
  41. 53fc032 Tegra194: add MC_SECURITY mask defines by Harvey Hsieh · Wed Aug 09 16:26:33 2017 +0800
  42. 8162109 Tegra194: program stream ids for XUSB by Ajay Gupta · Tue Aug 01 15:53:04 2017 -0700
  43. 7dfbca7 Tegra194: smmu: ISO support by Steven Kao · Tue Jul 25 12:44:32 2017 +0800
  44. 4035902 Tegra194: read-modify-write ACTLR_ELx registers by Steven Kao · Thu Jun 22 12:54:06 2017 +0800
  45. 0075990 Tegra194: platform support for memctrl/smmu drivers by Varun Wadekar · Wed May 31 11:41:00 2017 -0700
  46. f2d5466 Tegra194: add macros to read GPU reset status by Varun Wadekar · Wed Apr 26 08:57:27 2017 -0700
  47. 07897a9 Tegra194: add macros for security carveout configuration registers by Varun Wadekar · Mon Feb 13 09:00:04 2017 -0800
  48. 0d87c13 Tegra194: add 'TEGRA_TMRUS_SIZE' macro by Steven Kao · Tue Mar 07 13:13:27 2017 +0800
  49. 1c2b5c7 Tegra194: add support for multiple SMMU devices by Pritesh Raithatha · Tue Jan 24 14:16:07 2017 +0530
  50. ecd6a5a Tegra194: base commit for the platform by Varun Wadekar · Mon Apr 09 17:48:58 2018 -0700