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git01.mediatek.com / filogic / atf / 335d33f87f7d48c0429b4200d0c9fd5699369ea4 / services / std_svc
  1. 6a81641 PSCI: Add pwr_domain_pwr_down_wfi() hook in plat_psci_ops by Soby Mathew · Wed Apr 27 14:46:28 2016 +0100
  2. 391a76e Add 32 bit version of plat_get_syscnt_freq by Antonio Nino Diaz · Wed May 18 16:53:31 2016 +0100
  3. 7497bff Remove unused argument in psci_cpu_on_start() by Sandrine Bailleux · Mon Apr 25 09:28:43 2016 +0100
  4. 6181acb Validate psci_cpu_on_start() arguments by Sandrine Bailleux · Fri Apr 22 13:00:19 2016 +0100
  5. 1298e69 PSCI: Resolve GCC static analysis false positive by Soby Mathew · Tue Feb 02 14:23:10 2016 +0000
  6. ca37050 Fix PSCI CPU ON race when setting state to ON_PENDING by Soby Mathew · Tue Jan 26 11:47:53 2016 +0000
  7. 46dd170 Remove direct usage of __attribute__((foo)) by Soren Brinkmann · Thu Jan 14 10:11:05 2016 -0800
  8. f4119ec Miscellaneous doc fixes for v1.2 by Sandrine Bailleux · Thu Dec 17 13:58:58 2015 +0000
  9. 7d19941 Remove dashes from image names: 'BL3-x' --> 'BL3x' by Juan Castillo · Mon Dec 14 09:35:25 2015 +0000
  10. d50e7d9 PSCI: Update state only if CPU_OFF is not denied by SPD by Soby Mathew · Thu Oct 01 16:46:06 2015 +0100
  11. e9c4a64 Make generic code work in presence of system caches by Achin Gupta · Fri Sep 11 16:03:13 2015 +0100
  12. a31c9f3 Merge pull request #390 from vikramkanigiri/at/unify_bakery_locks_v2 by Achin Gupta · Mon Sep 14 21:49:10 2015 +0100
  13. e466c9f Re-design bakery lock memory allocation and algorithm by Andrew Thoelke · Thu Sep 10 11:39:36 2015 +0100
  14. 9a0ff9b Pass the target suspend level to SPD suspend hooks by Achin Gupta · Mon Sep 07 20:43:27 2015 +0100
  15. 011ca18 PSCI: Rework generic code to conform to coding guidelines by Soby Mathew · Wed Jul 29 17:05:03 2015 +0100
  16. f1f97a1 PSCI: Fix the return code for invalid entrypoint by Soby Mathew · Wed Jul 15 12:13:26 2015 +0100
  17. 981487a PSCI: Switch to the new PSCI frameworks by Soby Mathew · Mon Jul 13 14:10:57 2015 +0100
  18. 49473e4 PSCI: Implement platform compatibility layer by Soby Mathew · Wed Jun 10 13:49:59 2015 +0100
  19. 574d685 PSCI: Unify warm reset entry points by Sandrine Bailleux · Thu Jun 11 10:46:48 2015 +0100
  20. 85dbf5a PSCI: Add framework to handle composite power states by Soby Mathew · Tue Apr 07 12:16:56 2015 +0100
  21. 9d754f6 PSCI: Introduce new platform interface to describe topology by Soby Mathew · Wed Apr 08 17:42:06 2015 +0100
  22. b0082d2 PSCI: Introduce new platform and CM helper APIs by Soby Mathew · Thu Apr 09 13:40:55 2015 +0100
  23. 3a9e8bf PSCI: Remove references to affinity based power management by Soby Mathew · Tue May 05 16:33:16 2015 +0100
  24. 6b8b302 PSCI: Invoke PM hooks only for the highest level by Soby Mathew · Tue Jun 30 11:00:24 2015 +0100
  25. 991d42c PSCI: Create new directory to implement new frameworks by Soby Mathew · Mon Jun 29 16:30:12 2015 +0100
  26. 2e0764b Merge pull request #324 from soby-mathew/sm/sys_suspend by danh-arm · Thu Jul 02 16:17:11 2015 +0100
  27. 9ccbc03 Merge pull request #310 from sandrine-bailleux/sb/tf-issue-304-phase1 by danh-arm · Wed Jun 24 11:23:33 2015 +0100
  28. 9616838 PSCI: Add SYSTEM_SUSPEND API support by Soby Mathew · Wed Dec 17 14:47:57 2014 +0000
  29. 33e7d6a Fix integer extension in mpidr_set_aff_inst() by Andrew Thoelke · Thu Jun 11 14:22:07 2015 +0100
  30. 449dbd5 Introduce PROGRAMMABLE_RESET_ADDRESS build option by Sandrine Bailleux · Tue Jun 02 17:19:43 2015 +0100
  31. acde8b0 Rationalize reset handling code by Sandrine Bailleux · Tue May 19 11:54:45 2015 +0100
  32. 22fa7e4 PSCI: Set ON_PENDING state early during CPU_ON by Soby Mathew · Mon May 11 23:15:06 2015 +0100
  33. a877c25 Add support to indicate size and end of assembly functions by Kévin Petit · Tue Mar 24 14:03:57 2015 +0000
  34. 9b38fc8 Initialise cpu ops after enabling data cache by Vikram Kanigiri · Thu Jan 29 18:27:38 2015 +0000
  35. a64a854 Fix violations to the coding style by Sandrine Bailleux · Thu Mar 05 10:54:34 2015 +0000
  36. 2b7de2b Export maximum affinity using PLATFORM_MAX_AFFLVL macro by Soby Mathew · Thu Feb 12 14:45:02 2015 +0000
  37. 36433d1 Call reset handlers upon BL3-1 entry. by Yatharth Kochar · Thu Nov 20 18:09:41 2014 +0000
  38. 61e615b Verify capabilities before handling PSCI calls by Soby Mathew · Thu Jan 15 11:49:49 2015 +0000
  39. 6cdddaf Implement PSCI_FEATURES API by Soby Mathew · Wed Jan 07 11:10:22 2015 +0000
  40. 110fe36 Rework the PSCI migrate APIs by Soby Mathew · Thu Oct 23 10:35:34 2014 +0100
  41. 26fb90e Return success if an interrupt is seen during PSCI CPU_SUSPEND by Soby Mathew · Tue Jan 06 21:36:55 2015 +0000
  42. 74e52a7 Validate power_state and entrypoint when executing PSCI calls by Soby Mathew · Thu Oct 02 16:56:51 2014 +0100
  43. f512157 Save 'power_state' early in PSCI CPU_SUSPEND call by Soby Mathew · Tue Sep 30 11:19:51 2014 +0100
  44. 8595b87 Rework internal API to save non-secure entry point info by Soby Mathew · Tue Jan 06 15:36:38 2015 +0000
  45. 5f2c1b3 PSCI: Check early for invalid CPU state during CPU ON by Soby Mathew · Mon Jan 12 13:01:31 2015 +0000
  46. ffb4ab1 Remove `ns_entrypoint` and `mpidr` from parameters in pm_ops by Soby Mathew · Fri Sep 26 15:08:52 2014 +0100
  47. 2ae2043 Remove coherent memory from the BL memory maps by Soby Mathew · Thu Jan 08 18:02:44 2015 +0000
  48. 523d633 Move bakery algorithm implementation out of coherent memory by Soby Mathew · Thu Jan 08 18:02:19 2015 +0000
  49. 7d861ea Invalidate the dcache after initializing cpu-ops by Soby Mathew · Tue Nov 18 10:14:14 2014 +0000
  50. 2b69750 Fix CPU_SUSPEND when invoked with affinity level higher than get_max_afflvl() by Soby Mathew · Thu Oct 02 17:24:19 2014 +0100
  51. e2b2d8f Fix the array size of mpidr_aff_map_nodes_t. by Soby Mathew · Thu Dec 04 14:14:12 2014 +0000
  52. 8e2f287 Add CPU specific power management operations by Soby Mathew · Thu Aug 14 12:49:05 2014 +0100
  53. 56bcdc2 Miscellaneous PSCI code cleanups by Achin Gupta · Mon Jul 28 00:15:23 2014 +0100
  54. f6b9e99 Add APIs to preserve highest affinity level in OFF state by Achin Gupta · Thu Jul 31 11:19:11 2014 +0100
  55. cab78e4 Rework state management in the PSCI implementation by Achin Gupta · Mon Jul 28 00:09:01 2014 +0100
  56. f3ccbab Add PSCI service specific per-CPU data by Achin Gupta · Fri Jul 25 14:52:47 2014 +0100
  57. 4dc4a47 Add support for PSCI SYSTEM_OFF and SYSTEM_RESET APIs by Juan Castillo · Tue Aug 12 11:17:06 2014 +0100
  58. ed1744e Unmask SError interrupt and clear SCR_EL3.EA bit by Achin Gupta · Mon Aug 04 23:13:10 2014 +0100
  59. 2ed46e9 Optimize EL3 register state stored in cpu_context structure by Soby Mathew · Fri Jul 04 16:02:26 2014 +0100
  60. 9f09835 Simplify management of SCTLR_EL3 and SCTLR_EL1 by Achin Gupta · Fri Jul 18 18:38:28 2014 +0100
  61. 9c60d80 Remove the concept of coherent stacks by Achin Gupta · Thu Jun 26 11:12:37 2014 +0100
  62. e1aa516 Remove coherent stack usage from the warm boot path by Achin Gupta · Thu Jun 26 09:58:52 2014 +0100
  63. e998254 Make enablement of the MMU more flexible by Achin Gupta · Thu Jun 26 08:59:07 2014 +0100
  64. 2bc0785 Remove current CPU mpidr from PSCI common code by Andrew Thoelke · Mon Jun 09 12:44:21 2014 +0100
  65. 3c74a44 Merge pull request #152 from jcastillo-arm/jc/tf-issues/073-v2 by danh-arm · Tue Jun 24 16:48:31 2014 +0100
  66. 42970b0 Merge pull request #147 from athoelke/at/remove-bakery-mpidr by danh-arm · Tue Jun 24 16:44:12 2014 +0100
  67. 2d55240 Remove all checkpatch errors from codebase by Juan Castillo · Fri Jun 13 17:05:10 2014 +0100
  68. 958cc02 Remove calling CPU mpidr from bakery lock API by Andrew Thoelke · Mon Jun 09 12:54:15 2014 +0100
  69. fb06094 Merge pull request #145 from athoelke/at/psci-memory-optimization-v2 by danh-arm · Mon Jun 23 18:04:29 2014 +0100
  70. dc589aa Merge pull request #144 from athoelke/at/init-context-v2 by danh-arm · Mon Jun 23 18:02:36 2014 +0100
  71. 56f4470 Correctly dimension the PSCI aff_map_node array by Andrew Thoelke · Fri Jun 20 00:36:14 2014 +0100
  72. e9a0d11 Eliminate psci_suspend_context array by Andrew Thoelke · Fri Jun 20 00:38:03 2014 +0100
  73. 4e12607 Initialise CPU contexts from entry_point_info by Andrew Thoelke · Wed Jun 04 21:10:52 2014 +0100
  74. 4af473c Merge pull request #140 from athoelke/at/psci_smc_handler by danh-arm · Mon Jun 23 14:40:20 2014 +0100
  75. 4d2d553 Remove early_exceptions from BL3-1 by Andrew Thoelke · Mon Jun 02 12:38:12 2014 +0100
  76. 8c28fe0 Per-cpu data cache restructuring by Andrew Thoelke · Mon Jun 02 11:40:35 2014 +0100
  77. a2f6553 Provide cm_get/set_context() for current CPU by Andrew Thoelke · Wed May 14 17:09:32 2014 +0100
  78. 89a3c84 PSCI SMC handler improvements by Andrew Thoelke · Tue Jun 10 16:37:37 2014 +0100
  79. b226a4d Add enable mmu platform porting interfaces by Dan Handley · Fri May 16 14:08:45 2014 +0100
  80. ed6ff95 Split platform.h into separate headers by Dan Handley · Wed May 14 17:44:19 2014 +0100
  81. 60b13e3 Remove unused data declarations by Dan Handley · Wed May 14 15:13:16 2014 +0100
  82. a17fefa Remove extern keyword from function declarations by Dan Handley · Wed May 14 12:38:32 2014 +0100
  83. 58484d4 Merge pull request #102 from achingupta:ag/tf-issues#104-v2 by Andrew Thoelke · Fri May 23 11:00:04 2014 +0100
  84. 29c7ae1 Merge pull request #99 from vikramkanigiri:vk/tf-issues-133_V3 by Andrew Thoelke · Fri May 23 11:00:04 2014 +0100
  85. 1c5630d Merge pull request #67 from achingupta:ag/psci_standby_bug_fix by Andrew Thoelke · Fri May 23 11:00:04 2014 +0100
  86. 9cf2bb7 Introduce interrupt handling framework in BL3-1 by Achin Gupta · Fri May 09 11:07:09 2014 +0100
  87. 9851e42 Introduce macros to manipulate the SPSR by Vikram Kanigiri · Tue May 13 14:42:08 2014 +0100
  88. 5e5c207 Rework BL3-1 unhandled exception handling and reporting by Soby Mathew · Mon Apr 07 15:28:55 2014 +0100
  89. 42c5280 Fix broken standby state implementation in PSCI by Achin Gupta · Fri May 09 19:32:25 2014 +0100
  90. 74a62b3 fvp: Provide per-EL MMU setup functions by Sandrine Bailleux · Fri May 09 11:35:36 2014 +0100
  91. 9ceff0f Merge pull request #63 from soby-mathew/sm/save_callee_saved_registers_in_cpu_context-1 by danh-arm · Thu May 08 12:25:02 2014 +0100
  92. 6c5192a Preserve x19-x29 across world switch for exception handling by Soby Mathew · Wed Apr 30 15:36:37 2014 +0100
  93. f977ed8 Access system registers directly in assembler by Andrew Thoelke · Mon Apr 28 12:32:02 2014 +0100
  94. 42e75a7 Correct usage of data and instruction barriers by Andrew Thoelke · Mon Apr 28 12:28:39 2014 +0100
  95. a4cb68e Remove variables from .data section by Dan Handley · Wed Apr 23 13:47:06 2014 +0100
  96. 2bd4ef2 Reduce deep nesting of header files by Dan Handley · Wed Apr 09 13:14:54 2014 +0100
  97. e2712bc Always use named structs in header files by Dan Handley · Thu Apr 10 15:37:22 2014 +0100
  98. 27f6e7d Move PSCI global functions out of private header by Dan Handley · Wed Apr 23 15:22:18 2014 +0100
  99. bcd60ba Separate BL functions out of arch.h by Dan Handley · Thu Apr 17 18:53:42 2014 +0100
  100. 714a0d2 Make use of user/system includes more consistent by Dan Handley · Wed Apr 09 13:13:04 2014 +0100