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git01.mediatek.com / filogic / atf / 313c5581bb99fe21d0ae04492fe82cb9e5c4bf39 / bl31 / aarch64 / bl31_entrypoint.S
  1. 9d13402 refactor(gpt): productize and refactor GPT library by johpow01 · Wed Jun 16 17:57:28 2021 -0500
  2. 8e2e24b feat(rme): add GPT Library by Zelalem Aweke · Tue Jul 13 14:05:20 2021 -0500
  3. f4e6ea6 Changes necessary to support SEPARATE_NOBITS_REGION feature by Madhukar Pappireddy · Mon Jan 27 15:32:15 2020 -0600
  4. 615ec97 Revert "Changes necessary to support SEPARATE_NOBITS_REGION feature" by Mark Dykes · Wed Jan 22 21:52:44 2020 +0000
  5. 7a53980 Changes necessary to support SEPARATE_NOBITS_REGION feature by Madhukar Pappireddy · Thu Jan 16 22:21:33 2020 -0600
  6. 78dc10c pmf: Make the runtime instrumentation work on AArch32 by Bence Szépkúti · Thu Nov 07 12:09:24 2019 +0100
  7. c825768 PIE: make call to GDT relocation fixup generalized by Manish Pandey · Tue Nov 26 11:34:17 2019 +0000
  8. f41355c Refactor ARMv8.3 Pointer Authentication support code by Alexei Fedorov · Fri Sep 13 14:11:59 2019 +0100
  9. 90f2e88 Add support for Branch Target Identification by Alexei Fedorov · Fri May 24 12:17:09 2019 +0100
  10. 81de7ab PIE: Fix reloc at the beginning of bl31 entrypoint by Louis Mayencourt · Fri Mar 22 16:33:23 2019 +0000
  11. e71d26c BL31: Enable pointer authentication support in warm boot path by Alexei Fedorov · Wed Mar 06 11:15:51 2019 +0000
  12. 47a9064 BL31: Enable pointer authentication support by Antonio Nino Diaz · Thu Jan 31 11:01:26 2019 +0000
  13. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · Fri Dec 14 00:18:21 2018 +0000
  14. 4e28c20 PIE: Position Independant Executable support for BL31 by Soby Mathew · Sun Oct 14 08:09:22 2018 +0100
  15. f0b14cf Remove some MISRA defects in common code by Antonio Nino Diaz · Thu Oct 04 09:55:23 2018 +0100
  16. e834ee1 DynamIQ: Enable MMU without using stack by Jeenu Viswambharan · Fri Apr 27 15:17:03 2018 +0100
  17. 9c274f8 Merge pull request #1286 from antonio-nino-diaz-arm/an/mmu-mismatch by davidcunado-arm · Wed Feb 28 01:26:21 2018 +0000
  18. 7c2a3ca Add comments about mismatched TCR_ELx and xlat tables by Antonio Nino Diaz · Fri Feb 23 15:07:54 2018 +0000
  19. 73308d0 Introduce the new BL handover interface by Soby Mathew · Tue Jan 09 14:36:14 2018 +0000
  20. fee8653 Fully initialise essential control registers by David Cunado · Thu Apr 13 22:38:29 2017 +0100
  21. fa3cf0b Use SPDX license identifiers by dp-arm · Wed May 03 09:38:09 2017 +0100
  22. 043fe9c PSCI: Build option to enable D-Caches early in warmboot by Soby Mathew · Mon Apr 10 22:35:42 2017 +0100
  23. 1fecc8d Merge pull request #860 from jeenu-arm/hw-asstd-coh by davidcunado-arm · Fri Mar 17 12:34:37 2017 +0000
  24. 4ef91f1 Simplify translation tables headers dependencies by Antonio Nino Diaz · Mon Feb 20 14:22:22 2017 +0000
  25. 4614496 Enable data caches early with hardware-assisted coherency by Jeenu Viswambharan · Thu Jan 05 10:37:21 2017 +0000
  26. 3cac786 Add PMF instrumentation points in TF by dp-arm · Mon Sep 19 11:18:44 2016 +0100
  27. d019487 Introduce PSCI Library Interface by Soby Mathew · Fri Apr 29 19:01:30 2016 +0100
  28. 7d19941 Remove dashes from image names: 'BL3-x' --> 'BL3x' by Juan Castillo · Mon Dec 14 09:35:25 2015 +0000
  29. b21b02f Introduce COLD_BOOT_SINGLE_CPU build option by Sandrine Bailleux · Fri Oct 30 15:05:17 2015 +0000
  30. e9c4a64 Make generic code work in presence of system caches by Achin Gupta · Fri Sep 11 16:03:13 2015 +0100
  31. 449dbd5 Introduce PROGRAMMABLE_RESET_ADDRESS build option by Sandrine Bailleux · Tue Jun 02 17:19:43 2015 +0100
  32. acde8b0 Rationalize reset handling code by Sandrine Bailleux · Tue May 19 11:54:45 2015 +0100
  33. a877c25 Add support to indicate size and end of assembly functions by Kévin Petit · Tue Mar 24 14:03:57 2015 +0000
  34. 9b38fc8 Initialise cpu ops after enabling data cache by Vikram Kanigiri · Thu Jan 29 18:27:38 2015 +0000
  35. 36433d1 Call reset handlers upon BL3-1 entry. by Yatharth Kochar · Thu Nov 20 18:09:41 2014 +0000
  36. 2ae2043 Remove coherent memory from the BL memory maps by Soby Mathew · Thu Jan 08 18:02:44 2015 +0000
  37. 046cd3f Miscellaneous documentation fixes by Sandrine Bailleux · Wed Aug 06 11:27:23 2014 +0100
  38. 8e2f287 Add CPU specific power management operations by Soby Mathew · Thu Aug 14 12:49:05 2014 +0100
  39. c704cbc Introduce framework for CPU specific operations by Soby Mathew · Thu Aug 14 11:33:56 2014 +0100
  40. ed1744e Unmask SError interrupt and clear SCR_EL3.EA bit by Achin Gupta · Mon Aug 04 23:13:10 2014 +0100
  41. b3dbeb0 Call platform_is_primary_cpu() only from reset handler by Juan Castillo · Wed Jul 16 15:53:43 2014 +0100
  42. 45c31c4 Merge pull request #172 from soby-mathew/sm/asm_assert by danh-arm · Mon Jul 28 14:28:40 2014 +0100
  43. c1adbbc Rework the crash reporting in BL3-1 to use less stack by Soby Mathew · Wed Jun 25 10:07:40 2014 +0100
  44. 9f09835 Simplify management of SCTLR_EL3 and SCTLR_EL1 by Achin Gupta · Fri Jul 18 18:38:28 2014 +0100
  45. f4a9709 Remove coherent stack usage from the cold boot path by Achin Gupta · Wed Jun 25 19:26:22 2014 +0100
  46. f268c72 Merge pull request #151 from vikramkanigiri/vk/t133-code-readability by Andrew Thoelke · Fri Jun 27 14:10:04 2014 +0100
  47. cf79bf5 Simplify entry point information generation code on FVP by Vikram Kanigiri · Mon Jun 02 14:59:00 2014 +0100
  48. 4d2d553 Remove early_exceptions from BL3-1 by Andrew Thoelke · Mon Jun 02 12:38:12 2014 +0100
  49. 8c28fe0 Per-cpu data cache restructuring by Andrew Thoelke · Mon Jun 02 11:40:35 2014 +0100
  50. 9cf2bb7 Introduce interrupt handling framework in BL3-1 by Achin Gupta · Fri May 09 11:07:09 2014 +0100
  51. 9637745 Add support for BL3-1 as a reset vector by Vikram Kanigiri · Thu Apr 24 11:02:16 2014 +0100
  52. da56743 Populate BL31 input parameters as per new spec by Vikram Kanigiri · Tue Apr 15 18:08:08 2014 +0100
  53. a3a5e4a Rework handover interface between BL stages by Vikram Kanigiri · Thu May 15 18:27:15 2014 +0100
  54. 9ceff0f Merge pull request #63 from soby-mathew/sm/save_callee_saved_registers_in_cpu_context-1 by danh-arm · Thu May 08 12:25:02 2014 +0100
  55. 6c5192a Preserve x19-x29 across world switch for exception handling by Soby Mathew · Wed Apr 30 15:36:37 2014 +0100
  56. f977ed8 Access system registers directly in assembler by Andrew Thoelke · Mon Apr 28 12:32:02 2014 +0100
  57. 42e75a7 Correct usage of data and instruction barriers by Andrew Thoelke · Mon Apr 28 12:28:39 2014 +0100
  58. 2bd4ef2 Reduce deep nesting of header files by Dan Handley · Wed Apr 09 13:14:54 2014 +0100
  59. 714a0d2 Make use of user/system includes more consistent by Dan Handley · Wed Apr 09 13:13:04 2014 +0100
  60. 38bde41 Place assembler functions in separate sections by Andrew Thoelke · Tue Mar 18 13:46:55 2014 +0000
  61. 35ca351 Add support for BL3-2 in BL3-1 by Achin Gupta · Wed Feb 19 17:58:33 2014 +0000
  62. e4d084e Rework BL2 to BL3-1 hand over interface by Achin Gupta · Wed Feb 19 17:18:23 2014 +0000
  63. caa8493 Add support for handling runtime service requests by Jeenu Viswambharan · Thu Feb 06 10:36:15 2014 +0000
  64. b739f22 Setup VBAR_EL3 incrementally by Achin Gupta · Sat Jan 18 16:50:09 2014 +0000
  65. 3a4cae0 Change comments in assembler files to help ctags by Jeenu Viswambharan · Thu Jan 16 17:30:39 2014 +0000
  66. 4f60368 Do not trap access to floating point registers by Harry Liebel · Tue Jan 14 18:11:48 2014 +0000
  67. e83b0ca Update year in copyright text to 2014 by Dan Handley · Tue Jan 14 18:17:09 2014 +0000
  68. 93ca221 Make BL31's ns_entry_info a single-cpu area by Sandrine Bailleux · Mon Dec 02 15:57:09 2013 +0000
  69. ba6980a Move RUN_IMAGE constant from bl1.h to bl_common.h by Sandrine Bailleux · Mon Dec 02 15:41:25 2013 +0000
  70. ab2d31e Enable third party contributions by Dan Handley · Mon Dec 02 19:25:12 2013 +0000
  71. 65f546a Properly initialise the C runtime environment by Sandrine Bailleux · Thu Nov 28 09:43:06 2013 +0000
  72. 8d69a03 Various improvements/cleanups on the linker scripts by Sandrine Bailleux · Wed Nov 27 09:38:52 2013 +0000
  73. c10bd2c Move generic architectural setup out of blx_plat_arch_setup(). by Sandrine Bailleux · Tue Nov 12 16:41:16 2013 +0000
  74. 4f6ad66 ARMv8 Trusted Firmware release v0.2 by Achin Gupta · Fri Oct 25 09:08:21 2013 +0100