1. 30c231b Prevent optimisation of sysregs accessors calls by Sandrine Bailleux · 10 years ago
  2. e2b2d8f Fix the array size of mpidr_aff_map_nodes_t. by Soby Mathew · 10 years ago
  3. 06e90c5 Merge pull request #219 from jcastillo-arm/jc/tf-issues/253 by danh-arm · 10 years ago
  4. 8231295 Improvements to ARM GIC driver by Juan Castillo · 10 years ago
  5. c088433 Apply errata workarounds only when major/minor revisions match. by Soby Mathew · 10 years ago
  6. ee4217f Merge pull request #215 from jcastillo-arm/jc/juno_mem_6 by danh-arm · 10 years ago
  7. 921b877 Juno: Reserve some DDR-DRAM for secure use by Juan Castillo · 10 years ago
  8. 070a3e0 Merge pull request #206 from soby-mathew/sm/reset_cntvoff by Andrew Thoelke · 10 years ago
  9. b08bc04 Create BL stage specific translation tables by Soby Mathew · 10 years ago
  10. c93c9df Initialize SCTLR_EL1 based on MODE_RW bit by Jens Wiklander · 10 years ago
  11. feddfcf Reset CNTVOFF_EL2 register before exit into EL1 on warm boot by Soby Mathew · 10 years ago
  12. 046cd3f Miscellaneous documentation fixes by Sandrine Bailleux · 10 years ago
  13. 798140d Juno: Implement initial platform port by Sandrine Bailleux · 10 years ago
  14. 802f865 Add support for selected Cortex-A57 errata workarounds by Soby Mathew · 10 years ago
  15. 38b4bc9 Add CPU specific crash reporting handlers by Soby Mathew · 10 years ago
  16. 8e2f287 Add CPU specific power management operations by Soby Mathew · 10 years ago
  17. c704cbc Introduce framework for CPU specific operations by Soby Mathew · 10 years ago
  18. 1218f11 Rework use of labels in assembly macros. by Soby Mathew · 10 years ago
  19. 56bcdc2 Miscellaneous PSCI code cleanups by Achin Gupta · 10 years ago
  20. f6b9e99 Add APIs to preserve highest affinity level in OFF state by Achin Gupta · 10 years ago
  21. f3ccbab Add PSCI service specific per-CPU data by Achin Gupta · 10 years ago
  22. e4b9fa4 Add macro to flush per-CPU data by Achin Gupta · 10 years ago
  23. 4dc4a47 Add support for PSCI SYSTEM_OFF and SYSTEM_RESET APIs by Juan Castillo · 10 years ago
  24. 4fd2f5c Clarify platform porting interface to TSP by Dan Handley · 10 years ago
  25. e2c27f5 Move TSP private declarations into separate header by Dan Handley · 10 years ago
  26. 53c843a Simplify interface to TZC-400 driver by Dan Handley · 10 years ago
  27. 7b83c44 Move IO storage source to drivers directory by Dan Handley · 10 years ago
  28. 3aa9216 Remove redundant io_init() function by Dan Handley · 10 years ago
  29. be234f9 Remove platform dependency in CCI-400 driver by Dan Handley · 10 years ago
  30. cba2c50 Add concept of console output log levels by Dan Handley · 10 years ago
  31. 2ed46e9 Optimize EL3 register state stored in cpu_context structure by Soby Mathew · 10 years ago
  32. 5cd545d Merge pull request #177 from jcastillo-arm/jc/tf-issues/096 by danh-arm · 10 years ago
  33. 45c31c4 Merge pull request #172 from soby-mathew/sm/asm_assert by danh-arm · 10 years ago
  34. 3299181 Merge pull request #170 from achingupta/ag/tf-issues#226 by danh-arm · 10 years ago
  35. 289162c Merge pull request #169 from achingupta/ag/tf-issues#198 by danh-arm · 10 years ago
  36. f558cac Rework incorrect use of assert() and panic() in codebase by Juan Castillo · 10 years ago
  37. 0da9593 Add CPUECTLR_EL1 and Snoop Control register to crash reporting by Soby Mathew · 10 years ago
  38. c1adbbc Rework the crash reporting in BL3-1 to use less stack by Soby Mathew · 10 years ago
  39. 041f62a Implement an assert() callable from assembly code by Soby Mathew · 10 years ago
  40. 066f713 Introduce crash console APIs for crash reporting by Soby Mathew · 10 years ago
  41. 69817f7 Parametrize baudrate and UART clock during console_init() by Soby Mathew · 10 years ago
  42. c389d77 Introduce asm console functions in TF by Soby Mathew · 10 years ago
  43. 9f09835 Simplify management of SCTLR_EL3 and SCTLR_EL1 by Achin Gupta · 10 years ago
  44. 04be3a5 Add support for printing version at runtime by Juan Castillo · 10 years ago
  45. afe7e2f Implement a leaner printf for Trusted Firmware by Soby Mathew · 10 years ago
  46. e1aa516 Remove coherent stack usage from the warm boot path by Achin Gupta · 10 years ago
  47. e998254 Make enablement of the MMU more flexible by Achin Gupta · 10 years ago
  48. 47a6483 Merge pull request #162 from jcastillo-arm/jc/tf-issues/194 by danh-arm · 10 years ago
  49. cfa5e84 Merge pull request #164 from sandrine-bailleux/sb/bl30-support-v2 by danh-arm · 10 years ago
  50. f841ef0 Add support for BL3-0 image by Sandrine Bailleux · 10 years ago
  51. e8e04ec Merge pull request #157 from sandrine-bailleux/sb/tf-issue-109 by danh-arm · 10 years ago
  52. 49db8c2 Merge pull request #146 from danh-arm/dh/refactor-fvp-gic by danh-arm · 10 years ago
  53. 258e94f Allow FP register context to be optional at build time by Juan Castillo · 10 years ago
  54. fb42b12 Refactor fvp gic code to be a generic driver by Dan Handley · 10 years ago
  55. 1c54d97 Refactor fvp_config into common platform header by Dan Handley · 10 years ago
  56. 741a382 Calculate TCR bits based on VA and PA by Lin Ma · 10 years ago
  57. 467d057 Remove concept of top/bottom image loading by Sandrine Bailleux · 10 years ago
  58. 22129f5 Merge pull request #154 from athoelke/at/inline-mmio by Andrew Thoelke · 10 years ago
  59. 3c74a44 Merge pull request #152 from jcastillo-arm/jc/tf-issues/073-v2 by danh-arm · 10 years ago
  60. 42970b0 Merge pull request #147 from athoelke/at/remove-bakery-mpidr by danh-arm · 10 years ago
  61. af9dd82 Inline the mmio accessor functions by Andrew Thoelke · 10 years ago
  62. 2d55240 Remove all checkpatch errors from codebase by Juan Castillo · 10 years ago
  63. 958cc02 Remove calling CPU mpidr from bakery lock API by Andrew Thoelke · 10 years ago
  64. 56f4470 Correctly dimension the PSCI aff_map_node array by Andrew Thoelke · 10 years ago
  65. 4e12607 Initialise CPU contexts from entry_point_info by Andrew Thoelke · 10 years ago
  66. 40110f7 Merge pull request #138 from athoelke/at/cpu-context by danh-arm · 10 years ago
  67. 4d2d553 Remove early_exceptions from BL3-1 by Andrew Thoelke · 10 years ago
  68. c02dbd6 Move CPU context pointers into cpu_data by Andrew Thoelke · 10 years ago
  69. 8c28fe0 Per-cpu data cache restructuring by Andrew Thoelke · 10 years ago
  70. d25686a Merge pull request #131 from athoelke/at/cm_get_context by danh-arm · 10 years ago
  71. ddb312d Merge pull request #130 from athoelke/at/inline-asm-sysreg-v2 by danh-arm · 10 years ago
  72. a2f6553 Provide cm_get/set_context() for current CPU by Andrew Thoelke · 11 years ago
  73. 3f78dc3 Make system register functions inline assembly by Andrew Thoelke · 10 years ago
  74. 1359236 Enable mapping higher physical address by Lin Ma · 10 years ago
  75. 701fea7 Further renames of platform porting functions by Dan Handley · 11 years ago
  76. 2159ef4 Remove FVP specific comments in platform.h by Dan Handley · 11 years ago
  77. b226a4d Add enable mmu platform porting interfaces by Dan Handley · 11 years ago
  78. 7ce42df Move BL porting functions into platform.h by Dan Handley · 11 years ago
  79. ed6ff95 Split platform.h into separate headers by Dan Handley · 11 years ago
  80. 60b13e3 Remove unused data declarations by Dan Handley · 11 years ago
  81. a17fefa Remove extern keyword from function declarations by Dan Handley · 11 years ago
  82. 332ff85 Merge pull request #104 from athoelke:at/tsp-entrypoints-v2 by Andrew Thoelke · 11 years ago
  83. 077193f Merge pull request #105 from athoelke:sm/support_normal_irq_in_tsp-v2 by Andrew Thoelke · 11 years ago
  84. 58484d4 Merge pull request #102 from achingupta:ag/tf-issues#104-v2 by Andrew Thoelke · 11 years ago
  85. 29c7ae1 Merge pull request #99 from vikramkanigiri:vk/tf-issues-133_V3 by Andrew Thoelke · 11 years ago
  86. 1c5630d Merge pull request #67 from achingupta:ag/psci_standby_bug_fix by Andrew Thoelke · 11 years ago
  87. 891c4ca Use a vector table for TSP entrypoints by Andrew Thoelke · 11 years ago
  88. 9f71f70 Non-Secure Interrupt support during Standard SMC processing in TSP by Soby Mathew · 11 years ago
  89. aeaab68 Add S-EL1 interrupt handling support in the TSPD by Achin Gupta · 11 years ago
  90. 7671789 Add support for synchronous FIQ handling in TSP by Achin Gupta · 11 years ago
  91. 405406d Use secure timer to generate S-EL1 interrupts by Achin Gupta · 11 years ago
  92. 9cf2bb7 Introduce interrupt handling framework in BL3-1 by Achin Gupta · 11 years ago
  93. 02d3628 Introduce platform api to access an ARM GIC by Achin Gupta · 11 years ago
  94. 191e86e Introduce interrupt registration framework in BL3-1 by Achin Gupta · 11 years ago
  95. 27b895e Add context library API to change a bit in SCR_EL3 by Achin Gupta · 11 years ago
  96. 9637745 Add support for BL3-1 as a reset vector by Vikram Kanigiri · 11 years ago
  97. d8c9d26 Rework memory information passing to BL3-x images by Vikram Kanigiri · 11 years ago
  98. da56743 Populate BL31 input parameters as per new spec by Vikram Kanigiri · 11 years ago
  99. a3a5e4a Rework handover interface between BL stages by Vikram Kanigiri · 11 years ago
  100. 9851e42 Introduce macros to manipulate the SPSR by Vikram Kanigiri · 11 years ago