Gitiles
Code Review Sign In
git01.mediatek.com / filogic / atf / 2f1f610ea760b04362081157dcc49b61529806d5 / plat / renesas
  1. faea3fb plat: rcar: Move FDT from x3 to x1 by Marek Vasut · 6 years ago
  2. 4d693c2 plat: rcar: Generate FCNL reserved memory node by Marek Vasut · 6 years ago
  3. a987b00 plat: rcar: Generate platform compatible string by Marek Vasut · 6 years ago
  4. 93c85fc plat: rcar: Pass DTB with DRAM layout from BL2 to next stages by Marek Vasut · 6 years ago
  5. 6a6881a plat: rcar: Use array in the DRAM size reporting by Marek Vasut · 6 years ago
  6. 63659fd plat: rcar: Print DRAM configuration after init by Marek Vasut · 6 years ago
  7. 9963f70 plat: rcar: Fill in memory information for M3W, M3N by Marek Vasut · 6 years ago
  8. b0e1359 plat: rcar: Drop H3 v3.0 check on DRAM debug print by Marek Vasut · 6 years ago
  9. 8cb12ec plat: rcar: Add E3 1GBx4 debug print by Marek Vasut · 6 years ago
  10. 673bc32 plat: rcar: Move DRAM layout print to separate function by Marek Vasut · 6 years ago
  11. 87c0405 rcar-gen3: control RPC hyper-flash access by Jorge Ramirez-Ortiz · 6 years ago
  12. 5eb8837 Standardise header guards across codebase by Antonio Nino Diaz · 6 years ago
  13. 0a596b4 rcar_gen3: E3 target: fix compilation issues by ldts · 6 years ago
  14. 17227cc plat: rcar: support plat_crash_console_flush by ldts · 6 years ago
  15. 47503d2 rcar_gen3: drivers: staging by Jorge Ramirez-Ortiz · 6 years ago
  16. bf084dc rcar-gen3: initial commit for the rcar-gen3 boards by Jorge Ramirez-Ortiz · 6 years ago