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git01.mediatek.com / filogic / atf / 29b4665acdea7091606b0f8ca5948bfaf9b84900 / plat / nvidia / tegra / soc / t194 / plat_memctrl.c
  1. b1914ae Tegra194: memctrl: enable mc sid OVERRIDE for PCIE0R1 by Pritesh Raithatha · 7 years ago
  2. 1654e1c Tegra194: memctrl: set reorder depth limit for PCIE blocks by Puneet Saxena · 7 years ago
  3. e0dd683 Tegra194: memctrl: program MC_TXN_OVERRIDE reg for PTCR, MPCORE and MIU by Pritesh Raithatha · 7 years ago
  4. c2f067b Tegra194: memctrl: set CGID_TAG_ADR instead of CGID_TAG_DEFAULT by Pritesh Raithatha · 7 years ago
  5. 5b526df Tegra194: memctrl: update mss reprogramming as HW PROD settings by Puneet Saxena · 7 years ago
  6. 919e0e2 Tegra194: memctrl: Disable PVARDC coalescer by Arto Merilainen · 7 years ago
  7. 0273655 Tegra194: memctrl: force seswr/rd transactions as passsthru & coherent by Puneet Saxena · 7 years ago
  8. 3d8d2ab Tegra194: memctrl: force viw and vifalr/w transactions as non-coherent by Krishna Reddy · 7 years ago
  9. a1673b3 Tegra194: memctrl: fix bug in client order id reg value generation by Krishna Reddy · 7 years ago
  10. 45ea689 Tegra194: memctrl: enable mc coalescer by Pritesh Raithatha · 7 years ago
  11. b2b4305 Tegra194: memctrl: fix logic to check TZDRAM config register access by Steven Kao · 7 years ago
  12. ee93ed1 Tegra194: memctrl: platform handler for TZDRAM setup by Steven Kao · 7 years ago
  13. 0d42411 Tegra194: memctrl: override SE client as coherent by Puneet Saxena · 7 years ago
  14. 4607f17 Tegra194: rename secure scratch register macros by Steven Kao · 7 years ago
  15. 8bf6d4e Tegra194: fix defects flagged by MISRA scan by Anthony Zhou · 7 years ago
  16. 128f46a Tegra194: memctrl: platform handlers to reprogram MSS by Varun Wadekar · 5 years ago
  17. 8162109 Tegra194: program stream ids for XUSB by Ajay Gupta · 7 years ago
  18. 0075990 Tegra194: platform support for memctrl/smmu drivers by Varun Wadekar · 7 years ago