Log - 2998011a08f95bd2a3066145f2ea3cf484aa90dc - filogic/atf

2f94ca4 feat(intel): enable firewall for OCRAM in BL31 by Abdul Halim, Muhammad Hadi Asyrafi · Wed Aug 05 22:40:46 2020 +0800
b19ac61 feat(intel): add macro to switch between different UART PORT by Boon Khai Ng · Fri Aug 06 01:16:46 2021 +0800
6474096 intel: mailbox: Ensure time out duration is predictive by Chee Hong Ang · Mon May 11 00:55:01 2020 +0800
2382b11 intel: clear 'PLAT_SEC_ENTRY' in early platform setup by Chee Hong Ang · Fri Apr 24 21:51:00 2020 +0800
98b5a11 16550: Use generic console_t data structure by Andre Przywara · Sat Jan 25 00:58:35 2020 +0000
593c4c5 intel: Extend SiP service to support mailbox's RSU by Hadi Asyrafi · Tue Dec 17 19:22:17 2019 +0800
8ebd237 intel: System Manager refactoring by Hadi Asyrafi · Mon Dec 23 17:58:04 2019 +0800
67cb0ea intel: Refactor reset manager driver by Hadi Asyrafi · Mon Dec 23 13:25:33 2019 +0800
c8a281c intel: stratix10: Modify BL31 parameter handling by Hadi Asyrafi · Thu Oct 24 16:13:09 2019 +0800
0563a85 intel: stratix10: Enable uboot entrypoint support by Hadi Asyrafi · Tue Oct 22 12:59:32 2019 +0800
5ae876f intel: Refactor common platform code [5/5] by Hadi Asyrafi · Wed Oct 23 17:58:06 2019 +0800
6f8a2b2 intel: Refactor common platform code [3/5] by Hadi Asyrafi · Wed Oct 23 18:34:14 2019 +0800
f0fa807 intel: Refactor common platform code [2/5] by Hadi Asyrafi · Wed Oct 23 17:02:55 2019 +0800
9f5dfc9 intel: Refactor common platform code [1/5] by Hadi Asyrafi · Wed Oct 23 16:26:53 2019 +0800
462c6c4 Merge changes from topic "intel-plat-refactor" into integration by Sandrine Bailleux · Wed Aug 07 14:20:01 2019 +0000
309ac01 intel: Platform common code refactor by Hadi Asyrafi · Thu Aug 01 14:48:39 2019 +0800
acee488 intel: stratix10: Fix BL31 memory mapping by Hadi Asyrafi · Thu Aug 01 11:29:48 2019 +0800
ab34f74 plat: intel: Add BL31 support to Intel Stratix10 SoCFPGA platform by Tien Hock, Loh · Tue Feb 26 09:25:14 2019 +0800