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git01.mediatek.com / filogic / atf / 2998011a08f95bd2a3066145f2ea3cf484aa90dc / plat / intel
  1. e768dfa feat(intel): add SMC support for HWMON voltage and temp sensor by Kris Chaplin · Fri Jun 25 11:31:52 2021 +0100
  2. 2b8e005 feat(intel): add SMC support for Get USERCODE by Sieu Mun Tang · Wed Apr 27 18:57:29 2022 +0800
  3. bfda95a fix(intel): extend SDM command to return the SDM firmware version by Sieu Mun Tang · Wed Apr 27 18:54:10 2022 +0800
  4. d9006fc feat(intel): add SMC for enquiring firmware version by Abdul Halim, Muhammad Hadi Asyrafi · Fri Feb 05 11:50:58 2021 +0800
  5. 959143d fix(intel): configuration status based on start request by Abdul Halim, Muhammad Hadi Asyrafi · Tue Dec 29 16:49:23 2020 +0800
  6. 5406498 fix(intel): bit-wise configuration flag handling by Sieu Mun Tang · Thu Apr 28 22:40:58 2022 +0800
  7. 37c7076 fix(intel): get config status OK status by Abdul Halim, Muhammad Hadi Asyrafi · Fri Nov 20 11:41:59 2020 +0800
  8. fbc3913 fix(intel): use macro as return value by Abdul Halim, Muhammad Hadi Asyrafi · Fri Nov 20 11:06:00 2020 +0800
  9. 351e884 fix(intel): fix fpga config write return mechanism by Abdul Halim, Muhammad Hadi Asyrafi · Thu Nov 05 18:00:03 2020 +0800
  10. e6d5de9 feat(intel): add SiP service for DCMF status by Sieu Mun Tang · Thu Apr 28 22:21:01 2022 +0800
  11. 681631b feat(intel): add RSU 'Max Retry' SiP SMC services by Chee Hong Ang · Wed Jul 01 14:22:25 2020 +0800
  12. b30ce3f feat(intel): enable SMC SoC FPGA bridges enable/disable by Abdul Halim, Muhammad Hadi Asyrafi · Thu Jun 18 16:21:29 2020 +0800
  13. 2cfd8ec feat(intel): add SMC/PSCI services for DCMF version support by Chee Hong Ang · Wed May 13 11:44:04 2020 +0800
  14. 869d4f5 feat(intel): allow to access all register addresses if DEBUG=1 by Siew Chin Lim · Tue May 11 21:12:22 2021 +0800
  15. b251c33 fix(intel): modify how configuration type is handled by Abdul Halim, Muhammad Hadi Asyrafi · Fri May 29 12:13:17 2020 +0800
  16. f9cb657 feat(intel): support SiP SVC version by Sieu Mun Tang · Wed Apr 27 18:24:06 2022 +0800
  17. 2f94ca4 feat(intel): enable firewall for OCRAM in BL31 by Abdul Halim, Muhammad Hadi Asyrafi · Wed Aug 05 22:40:46 2020 +0800
  18. 1205ef0 feat(intel): create source file for firewall configuration by Abdul Halim, Muhammad Hadi Asyrafi · Thu Aug 06 10:21:54 2020 +0800
  19. 616b5e7 fix(intel): refactor NOC header by Abdul Halim, Muhammad Hadi Asyrafi · Wed Aug 05 22:12:23 2020 +0800
  20. b19ac61 feat(intel): add macro to switch between different UART PORT by Boon Khai Ng · Fri Aug 06 01:16:46 2021 +0800
  21. a34b881 feat(intel): add SMC support for ROM Patch SHA384 mailbox by Sieu Mun Tang · Thu Mar 17 03:11:55 2022 +0800
  22. 1e5550b build(intel): enable access to on-chip ram in BL31 for N5X by Boon Khai Ng · Fri May 21 22:56:37 2021 +0800
  23. a544da1 fix(intel): make FPGA memory configurations platform specific by Sieu Mun Tang · Mon Feb 28 15:24:59 2022 +0800
  24. dbcc2cf fix(intel): fix ECC Double Bit Error handling by Sieu Mun Tang · Mon Mar 07 12:13:04 2022 +0800
  25. f3a5d02 build(intel): define a macro for SIMICS build by Abdul Halim, Muhammad Hadi Asyrafi · Mon Jun 29 12:15:27 2020 +0800
  26. 8881ad0 build(intel): add N5X as a new Intel platform by Sieu Mun Tang · Mon Mar 07 12:04:59 2022 +0800
  27. 9f22cbf build(intel): initial commit for crypto driver by Sieu Mun Tang · Wed Mar 02 11:04:09 2022 +0800
  28. c353b0a Merge "fix(intel): assert if bl_mem_params is NULL pointer" into integration by Madhukar Pappireddy · Mon Feb 28 20:36:30 2022 +0100
  29. f57b5cc Merge changes I75b3e3bf,I4cf9f1d9,I50d2ae74,Idbe62410,I84bbd06e, ... into integration by Madhukar Pappireddy · Mon Feb 28 17:18:39 2022 +0100
  30. 2468266 fix(intel): null pointer handling for resp_len by Sieu Mun Tang · Sat Feb 19 21:49:48 2022 +0800
  31. 33b89d5 fix(intel): define macros to handle buffer entries by Abdul Halim, Muhammad Hadi Asyrafi · Fri Jun 05 15:12:29 2020 +0800
  32. f02f0cb fix(intel): change SMC return arguments for INTEL_SIP_SMC_MBOX_SEND_CMD by Sieu Mun Tang · Sat Feb 19 20:36:41 2022 +0800
  33. bf90984 fix(intel): always set doorbell to SDM after sending command by Siew Chin Lim · Fri Jul 30 00:40:48 2021 +0800
  34. a076315 fix(intel): fix bit masking issue in intel_secure_reg_update by Siew Chin Lim · Sat Jul 10 00:55:35 2021 +0800
  35. 461f544 fix(intel): fix ddr address range checker by Abdul Halim, Muhammad Hadi Asyrafi · Fri Jul 03 13:22:09 2020 +0800
  36. 380924d fix(intel): assert if bl_mem_params is NULL pointer by Siew Chin Lim · Sat Jun 12 13:25:05 2021 +0800
  37. ae4cd3a fix(intel): enable HPS QSPI access by default by Abdul Halim, Muhammad Hadi Asyrafi · Tue Oct 06 20:09:53 2020 +0800
  38. cf93158 plat/intel: do not keep mmc_device_info in stack by Yann Gautier · Mon Mar 22 14:21:54 2021 +0100
  39. 118ab21 intel: common: Fix non-MISRA compliant code v2 by Abdul Halim, Muhammad Hadi Asyrafi · Thu Oct 15 15:27:18 2020 +0800
  40. 1b0e8cb intel: mailbox: Fix non-MISRA compliant code by Abdul Halim, Muhammad Hadi Asyrafi · Tue Sep 01 21:05:18 2020 +0800
  41. 5bc87bc intel: mailbox: Mailbox error recovery handling by Chee Hong Ang · Mon May 11 11:23:21 2020 +0800
  42. 7d66e14 intel: mailbox: Enable sending large mailbox command by Abdul Halim, Muhammad Hadi Asyrafi · Tue Jun 02 01:06:33 2020 +0800
  43. 14a1d43 intel: mailbox: Use retry count in mailbox poll by Abdul Halim, Muhammad Hadi Asyrafi · Tue Jun 02 01:05:24 2020 +0800
  44. 6474096 intel: mailbox: Ensure time out duration is predictive by Chee Hong Ang · Mon May 11 00:55:01 2020 +0800
  45. 39d137b intel: mailbox: Read mailbox response even there is an error by Chee Hong Ang · Mon May 11 00:40:18 2020 +0800
  46. 94fae38 intel: mailbox: Driver now handles larger response by Abdul Halim, Muhammad Hadi Asyrafi · Wed Apr 29 22:26:40 2020 +0800
  47. 20a07f3 intel: common: Change how mailbox handles job id & buffer by Abdul Halim, Muhammad Hadi Asyrafi · Mon May 18 11:16:48 2020 +0800
  48. 046e1f1 intel: common: Improve readability of mailbox read response by Abdul Halim, Muhammad Hadi Asyrafi · Wed Feb 12 19:57:44 2020 +0800
  49. 99b5e16 intel: SIP: increase FPGA_CONFIG_SIZE to 32 MB by Richard Gong · Mon Apr 13 09:40:43 2020 -0500
  50. 2b7d13e intel: common: Remove urgent from mailbox async by Abdul Halim, Muhammad Hadi Asyrafi · Mon May 18 10:32:15 2020 +0800
  51. b45f15e intel: common: Improve mailbox driver readability by Abdul Halim, Muhammad Hadi Asyrafi · Thu May 14 15:32:43 2020 +0800
  52. ec164b6 intel: common: Clean up mailbox and sip header by Abdul Halim, Muhammad Hadi Asyrafi · Thu May 14 14:53:29 2020 +0800
  53. 2382b11 intel: clear 'PLAT_SEC_ENTRY' in early platform setup by Chee Hong Ang · Fri Apr 24 21:51:00 2020 +0800
  54. 0ae8d9a intel: platform: Include GICv2 makefile by Abdul Halim, Muhammad Hadi Asyrafi · Wed Aug 19 14:50:01 2020 +0800
  55. 64d2b2f plat: intel: Additional instruction required to enable global timer by Tien Hock Loh · Mon May 11 01:12:03 2020 -0700
  56. 070ffbb plat: intel: Fix CCU initialization for Agilex by Tien Hock Loh · Mon May 11 01:11:55 2020 -0700
  57. c5baddf plat: intel: Add FPGAINTF configuration to when configuring pinmux by Tien Hock Loh · Mon May 11 01:11:48 2020 -0700
  58. fcbc33d plat: intel: set DRVSEL and SMPLSEL for DWMMC by Tien Hock Loh · Mon May 11 01:11:39 2020 -0700
  59. 7a5f8da plat: intel: Fix clock configuration bugs by Tien Hock Loh · Mon May 11 01:11:23 2020 -0700
  60. 7dd4add Merge "intel: Enable EMAC PHY in Intel FPGA platform" into integration by Sandrine Bailleux · Fri Feb 28 10:51:49 2020 +0000
  61. 6bedfe2 Merge "intel: Fix argument type for mailbox driver" into integration by Sandrine Bailleux · Fri Feb 28 10:23:10 2020 +0000
  62. 25f623e intel: Update RSU driver return code by Abdul Halim, Muhammad Hadi Asyrafi · Thu Feb 27 10:23:48 2020 +0800
  63. 98b5a11 16550: Use generic console_t data structure by Andre Przywara · Sat Jan 25 00:58:35 2020 +0000
  64. d84bfef intel: Fix argument type for mailbox driver by Abdul Halim, Muhammad Hadi Asyrafi · Tue Feb 25 16:28:10 2020 +0800
  65. 8d9e891 intel: Enable EMAC PHY in Intel FPGA platform by Tien Hock, Loh · Wed Oct 02 13:49:25 2019 +0800
  66. c4c4dec Merge "intel: Fix Coverity Scan Defects" into integration by Sandrine Bailleux · Thu Feb 20 09:53:26 2020 +0000
  67. e59b999 intel: Fix Coverity Scan Defects by Abdul Halim, Muhammad Hadi Asyrafi · Tue Feb 11 20:17:05 2020 +0800
  68. 7f95059 Merge "intel: Change boot source selection" into integration by Sandrine Bailleux · Wed Feb 12 15:54:02 2020 +0000
  69. c39a0e0 intel: Include address range check for SiP Mailbox by Abdul Halim, Muhammad Hadi Asyrafi · Thu Feb 06 19:18:41 2020 +0800
  70. a33e810 intel: Introduce SMC support for mailbox command by Hadi Asyrafi · Tue Dec 17 19:30:41 2019 +0800
  71. 593c4c5 intel: Extend SiP service to support mailbox's RSU by Hadi Asyrafi · Tue Dec 17 19:22:17 2019 +0800
  72. 29c65f7 Merge "intel: agilex: Enable uboot BL31 loading" into integration by Manish Pandey · Tue Feb 04 13:42:36 2020 +0000
  73. 786db4d intel: Change boot source selection by Hadi Asyrafi · Mon Dec 30 16:00:30 2019 +0800
  74. 218d8fe intel: agilex: Enable uboot BL31 loading by Hadi Asyrafi · Tue Jan 14 10:51:31 2020 +0800
  75. fc9b411 Enable -Wredundant-decls warning check by Madhukar Pappireddy · Mon Dec 23 14:49:52 2019 -0600
  76. dda01cb intel: Unify Platform specific defines for PSCI module by Deepika Bhavnani · Fri Dec 13 10:50:36 2019 -0600
  77. 6aeb55d intel: Add function to check fpga readiness by Hadi Asyrafi · Tue Dec 24 14:43:22 2019 +0800
  78. 36a9f30 intel: Add bridge control for FPGA reconfig by Hadi Asyrafi · Tue Dec 24 10:42:52 2019 +0800
  79. 0c6dae2 intel: FPGA config_isdone() status query by Hadi Asyrafi · Tue Dec 17 23:33:39 2019 +0800
  80. 8ebd237 intel: System Manager refactoring by Hadi Asyrafi · Mon Dec 23 17:58:04 2019 +0800
  81. 67cb0ea intel: Refactor reset manager driver by Hadi Asyrafi · Mon Dec 23 13:25:33 2019 +0800
  82. e73c511 intel: Enable bridge access in Intel platform by Hadi Asyrafi · Mon Oct 21 16:35:08 2019 +0800
  83. 3afb87a intel: Modify non secure access function by Hadi Asyrafi · Mon Oct 21 16:27:29 2019 +0800
  84. ed6927d Merge "plat: intel: Fix UEFI decompression issue" into integration by Manish Pandey · Wed Jan 15 16:11:56 2020 +0000
  85. b1ab915 plat: intel: Fix UEFI decompression issue by Tien Hock, Loh · Mon Oct 14 14:48:24 2019 +0800
  86. cee6aa9 intel: Change all global sip function to static by Hadi Asyrafi · Tue Dec 17 15:25:04 2019 +0800
  87. af5dec6 Merge changes from topic "sip-svc" into integration by Manish Pandey · Tue Jan 14 22:24:30 2020 +0000
  88. 99361aa Merge "intel: Fix memory calibration" into integration by Manish Pandey · Tue Jan 14 18:28:43 2020 +0000
  89. 3ceb8d9 intel: Remove un-needed checks for qspi driver r/w by Hadi Asyrafi · Mon Jan 13 16:26:22 2020 +0800
  90. 1fab9c3 Remove redundant declarations. by Madhukar Pappireddy · Thu Jan 02 16:32:41 2020 -0600
  91. 966f282 intel: Fix memory calibration by Hadi Asyrafi · Wed Oct 16 13:02:22 2019 +0800
  92. 5fae68f intel: Implement platform specific system reset 2 by Hadi Asyrafi · Tue Oct 22 14:23:57 2019 +0800
  93. 6794230 intel: Enable SiP SMC secure register access by Hadi Asyrafi · Tue Oct 22 13:28:51 2019 +0800
  94. 1e2e3ce Merge changes from topic "mailbox-fixes" into integration by Manish Pandey · Thu Dec 19 17:33:03 2019 +0000
  95. 5011d23 Merge "intel: Create SiP service header file" into integration by Manish Pandey · Wed Dec 18 17:38:08 2019 +0000
  96. f3a7c14 intel: Fix SMC SIP service by Hadi Asyrafi · Tue Nov 12 16:29:03 2019 +0800
  97. 9dfc047 intel: Introduce mailbox response length handling by Hadi Asyrafi · Tue Nov 12 16:39:46 2019 +0800
  98. 2b9198d intel: Fix mailbox config return status by Hadi Asyrafi · Tue Nov 12 15:03:00 2019 +0800
  99. a91818f intel: Mailbox driver logic fixes by Hadi Asyrafi · Tue Nov 12 14:55:26 2019 +0800
  100. 500b232 plat: intel: Fix FPGA manager on reconfiguration by Tien Hock, Loh · Wed Oct 30 14:49:40 2019 +0800