1. af54f6e Aarch64: Add support for FEAT_MTE3 by Alexei Fedorov · Tue Dec 01 13:22:25 2020 +0000
  2. 9faad3c Add support for Neoverse-N2 CPUs. by Javier Almansa Sobrino · Fri Oct 23 13:22:07 2020 +0100
  3. 1cc4407 Revert workaround for A77 erratum 1800714 by johpow01 · Thu Nov 12 14:15:41 2020 -0600
  4. 2730c32 Revert workaround for A76 erratum 1800710 by johpow01 · Thu Nov 12 13:32:00 2020 -0600
  5. 04b7e43 lib: el3_runtime: Fix SPE system registers in el2_sysregs_context by Arunachalam Ganapathy · Fri Oct 09 14:51:41 2020 +0100
  6. dd3ec7e lib: el3_runtime: Conditionally save/restore EL2 NEVE registers by Arunachalam Ganapathy · Thu May 28 11:57:09 2020 +0100
  7. dca591b lib: el3_runtime: Fix aarch32 system registers in el2_sysregs_context by Arunachalam Ganapathy · Tue May 26 11:32:35 2020 +0100
  8. f68a683 Merge "Increase type widths to satisfy width requirements" into integration by Joanna Farley · Sun Oct 18 14:51:00 2020 +0000
  9. f32ca3f Merge changes Iba51bff1,I3f563cff into integration by Madhukar Pappireddy · Fri Oct 16 22:00:04 2020 +0000
  10. 86f7fb7 Update in coreboot_get_memory_type API to include size as well by Saurabh Gorecha · Thu Oct 15 00:05:36 2020 +0530
  11. 8b346c5 Merge "Don't return error information from console_flush" into integration by Mark Dykes · Wed Oct 14 18:59:27 2020 +0000
  12. ed20207 Increase type widths to satisfy width requirements by Jimmy Brisson · Tue Aug 04 16:18:52 2020 -0500
  13. 39f9eee Don't return error information from console_flush by Jimmy Brisson · Wed Aug 05 13:44:05 2020 -0500
  14. a2fa12c Workaround for Cortex A77 erratum 1925769 by johpow01 · Thu Sep 10 13:39:26 2020 -0500
  15. 935f3e4 Merge changes from topics "rename-herculesae-a78ae", "rename-zeus-v1" into integration by Madhukar Pappireddy · Tue Oct 06 23:35:55 2020 +0000
  16. 208c186 Merge "Workaround for Cortex A76 erratum 1868343" into integration by Madhukar Pappireddy · Mon Oct 05 22:49:10 2020 +0000
  17. 958a0b1 Rename Neoverse Zeus to Neoverse V1 by Jimmy Brisson · Wed Sep 30 15:28:03 2020 -0500
  18. 7cc90c4 Rename Cortex Hercules AE to Cortex 78 AE by Jimmy Brisson · Wed Sep 30 15:34:51 2020 -0500
  19. 81365e3 Workaround for Cortex A76 erratum 1868343 by johpow01 · Tue Sep 29 17:19:09 2020 -0500
  20. dff3fe1 libfdt: Upgrade libfdt source files by Andre Przywara · Thu Oct 01 22:41:48 2020 +0100
  21. 3671d6f Merge "Workaround for Cortex A77 erratum 1508412" into integration by Madhukar Pappireddy · Tue Sep 29 18:43:00 2020 +0000
  22. e867a90 Merge changes I1ecbe5a1,Ib5945c37,Ic6b79648 into integration by Manish Pandey · Tue Sep 29 12:17:21 2020 +0000
  23. 38cf520 Merge "arm_fpga: Add support for unknown MPIDs" into integration by André Przywara · Mon Sep 28 18:25:03 2020 +0000
  24. 9b4e3d7 lib/cpus: add support for Morello Rainier CPUs by Manoj Kumar · Thu Jul 09 09:56:02 2020 +0100
  25. 99ad976 Workaround for Cortex A77 erratum 1508412 by laurenw-arm · Tue Jul 14 14:18:34 2020 -0500
  26. e1ecd23 arm_fpga: Add support for unknown MPIDs by Javier Almansa Sobrino · Thu Aug 20 18:48:09 2020 +0100
  27. 741b1c0 Merge "plat/arm: Introduce and use libc_asm.mk makefile" into integration by Olivier Deprez · Thu Sep 24 14:39:24 2020 +0000
  28. d7e7be3 libc: Import strtok_r from FreeBSD project by Madhukar Pappireddy · Wed Sep 16 18:58:49 2020 -0500
  29. 8e509d6 Merge "SPE: Fix feature detection" into integration by Madhukar Pappireddy · Tue Sep 15 21:21:24 2020 +0000
  30. 39317ab lib: fconf: Implement a parser to populate CoT by Manish V Badarkhe · Thu Jul 23 10:43:57 2020 +0100
  31. 7828f22 SPE: Fix feature detection by Andre Przywara · Fri Sep 11 09:18:09 2020 +0100
  32. 0aa0896 Merge "libc: Import strlcat from FreeBSD project" into integration by Mark Dykes · Fri Sep 11 18:44:19 2020 +0000
  33. 134bf86 Merge "libc: Add support for vsnprintf()" into integration by Mark Dykes · Fri Sep 11 18:42:23 2020 +0000
  34. 3862970 libc: Add support for vsnprintf() by Madhukar Pappireddy · Tue Sep 08 19:00:00 2020 -0500
  35. f16f214 Merge "Workaround for Neoverse N1 erratum 1868343" into integration by Madhukar Pappireddy · Fri Sep 11 14:56:35 2020 +0000
  36. e2428fd Workaround for Neoverse N1 erratum 1868343 by johpow01 · Wed Aug 05 12:27:12 2020 -0500
  37. af0cd5f libc: Import strlcat from FreeBSD project by Madhukar Pappireddy · Fri Sep 04 14:04:23 2020 -0500
  38. 30ceca4 Merge "libc: memset: improve performance by avoiding single byte writes" into integration by Mark Dykes · Wed Sep 09 18:36:08 2020 +0000
  39. 16e7bcf libc: memset: improve performance by avoiding single byte writes by Andre Przywara · Thu Sep 03 11:04:39 2020 +0100
  40. 2b010ea Merge "lib: cpu: Check SCU presence in DSU before accessing DSU registers" into integration by Manish Pandey · Thu Sep 03 21:16:17 2020 +0000
  41. 1203004 psci: utility api to invoke stop for other cores by Sandeep Tripathy · Mon Aug 17 20:22:13 2020 +0530
  42. 2381d2e plat/arm: Introduce and use libc_asm.mk makefile by Alexei Fedorov · Tue Sep 01 15:38:32 2020 +0100
  43. f01ea60 lib: cpu: Check SCU presence in DSU before accessing DSU registers by Pramod Kumar · Wed Feb 05 11:27:57 2020 +0530
  44. 5bd5ae9 cpus: denver: skip DCO enable/disable for recent SKUs by Varun Wadekar · Wed Aug 05 23:10:40 2020 -0700
  45. 96e081d lib: cpus: denver: add MIDR PN9 variant by Hemant Nigam · Tue Dec 17 14:21:38 2019 -0800
  46. 3bdb40b cpus: denver: introduce macro to declare cpu_ops by Varun Wadekar · Fri Aug 28 14:00:15 2020 -0700
  47. c58a13e Add support for hexadecimal and pointer format specifiers to snprintf() by Javier Almansa Sobrino · Fri Aug 21 17:32:03 2020 +0100
  48. 718c876 lib: cpus: sanity check pointers before use by Varun Wadekar · Tue Oct 01 09:34:10 2019 -0700
  49. 8db11fd Merge "Revert "libc/memset: Implement function in assembler"" into integration by Mark Dykes · Fri Aug 21 19:44:05 2020 +0000
  50. ad5ab07 Revert "libc/memset: Implement function in assembler" by Mark Dykes · Wed Aug 19 19:11:33 2020 +0000
  51. e0d3382 Merge changes from topic "at_errata_fix" into integration by Olivier Deprez · Thu Aug 20 14:40:06 2020 +0000
  52. 3ad26ae libc/memset: Implement function in assembler by Alexei Fedorov · Sun Aug 16 16:01:13 2020 +0100
  53. 4283ed1 SPM: Change condition on saving/restoring EL2 registers by Ruari Phipps · Tue Jul 28 11:26:29 2020 +0100
  54. e07e808 runtime_exceptions: Update AT speculative workaround by Manish V Badarkhe · Thu Jul 23 12:43:25 2020 +0100
  55. 7672edf lib/cpus: Report AT speculative erratum workaround by Manish V Badarkhe · Mon Aug 03 18:43:14 2020 +0100
  56. 2b0ee97 el3_runtime: Rearrange context offset of EL1 sys registers by Manish V Badarkhe · Tue Jul 28 07:22:30 2020 +0100
  57. d73c1ba el3_runtime: Update context save and restore routines for EL1 and EL2 by Manish V Badarkhe · Tue Jul 28 07:12:56 2020 +0100
  58. 30d20bb Merge "lib: cpus: denver: add some MIDR values" into integration by Varun Wadekar · Fri Aug 14 20:32:44 2020 +0000
  59. 46a92ca Merge changes from topic "sp_dual_signing" into integration by Sandrine Bailleux · Fri Aug 14 11:44:58 2020 +0000
  60. a722574 Merge "lib: cpus: denver: mark exception vectors as private" into integration by Mark Dykes · Thu Aug 13 21:09:09 2020 +0000
  61. a9c4521 TF-A AMU: remove AMU enable info print by Olivier Deprez · Thu Aug 13 12:55:54 2020 +0200
  62. 3f0d7af cert_create: add Platform owned secure partitions support by Manish Pandey · Fri Jul 24 16:43:54 2020 +0100
  63. 7e6306b TF-A AMU extension: fix detection of group 1 counters. by Alexei Fedorov · Tue Jul 14 08:17:56 2020 +0100
  64. 28a6df4 Merge "MISRA cleanup in mem_region and semihosting files" into integration by Madhukar Pappireddy · Sun Aug 09 17:21:48 2020 +0000
  65. 5f68fa7 lib: cpus: denver: add some MIDR values by Alex Van Brunt · Tue Jul 23 10:00:42 2019 -0700
  66. 2c92b41 lib: cpus: denver: mark exception vectors as private by Varun Wadekar · Thu Jun 13 11:55:05 2019 -0700
  67. d4cb853 MISRA cleanup in mem_region and semihosting files by johpow01 · Thu Jul 30 17:11:03 2020 -0500
  68. 0a5ff01 Merge "Use abspath to dereference $BUILD_BASE" into integration by Alexei Fedorov · Wed Aug 05 16:31:27 2020 +0000
  69. 388248a Use abspath to dereference $BUILD_BASE by Grant Likely · Thu Jul 30 08:50:10 2020 +0100
  70. df834a9 Merge "TF-A Aarch32: optimise memcpy4()" into integration by Manish Pandey · Mon Aug 03 22:24:29 2020 +0000
  71. dc88b58 Aarch32 xlat_tables lib: Fix MISRA-2012 defects by Alexei Fedorov · Tue Jul 28 12:26:36 2020 +0100
  72. 3074fa5 Merge "Revert workaround for Neoverse N1 erratum 1800710" into integration by Lauren Wehrmeister · Thu Jul 23 20:02:15 2020 +0000
  73. eb8d429 Revert workaround for Neoverse N1 erratum 1800710 by johpow01 · Thu Jul 23 13:05:45 2020 -0500
  74. 7a2090a TF-A Aarch32: optimise memcpy4() by Alexei Fedorov · Thu Jul 23 18:35:49 2020 +0100
  75. 6a91e59 lib/fconf: Update 'set_fw_config_info' function by Manish V Badarkhe · Wed Jul 15 05:08:37 2020 +0100
  76. a8be3bb lib/fconf: Update data type of config max size by Manish V Badarkhe · Wed Jul 15 04:27:57 2020 +0100
  77. 40e7d6c TF-A: Add support for Measured Boot driver to FCONF by Alexei Fedorov · Mon Jul 13 14:10:00 2020 +0100
  78. b7c045a Merge "Upgrade libfdt source files" into integration by Sandrine Bailleux · Wed Jul 08 06:54:39 2020 +0000
  79. ee4d02a Merge "Workaround for Neoverse N1 erratum 1800710" into integration by Lauren Wehrmeister · Wed Jul 01 16:57:11 2020 +0000
  80. 596fe0a Upgrade libfdt source files by Madhukar Pappireddy · Mon Jun 15 17:19:09 2020 -0500
  81. 8d0effa Merge changes from topic "fw_config_handoff" into integration by Sandrine Bailleux · Fri Jun 26 07:06:52 2020 +0000
  82. 6d9b5ee Workaround for Neoverse N1 erratum 1800710 by johpow01 · Tue Jun 02 13:14:11 2020 -0500
  83. 68aedc7 Workaround for Cortex A77 erratum 1800714 by johpow01 · Wed Jun 03 15:23:31 2020 -0500
  84. 99a8e14 plat/arm: Load and populate fw_config and tb_fw_config by Manish V Badarkhe · Thu Jun 11 22:32:11 2020 +0100
  85. e069f8a fconf: Handle error from fconf_load_config by Manish V Badarkhe · Thu Jun 11 22:25:53 2020 +0100
  86. bb533c7 fconf: Allow fconf to load additional firmware configuration by Manish V Badarkhe · Thu Jun 11 22:17:30 2020 +0100
  87. 1da211a fconf: Clean confused naming between TB_FW and FW_CONFIG by Manish V Badarkhe · Sun May 31 10:17:59 2020 +0100
  88. e9207d6 fiptool: Add fw_config in FIP by Manish V Badarkhe · Thu Jun 11 21:02:03 2020 +0100
  89. 64616a5 plat/arm: Rentroduce tb_fw_config device tree by Manish V Badarkhe · Sun May 31 08:53:40 2020 +0100
  90. 5c9ed08 Workaround for Cortex A76 erratum 1800710 by johpow01 · Tue Jun 02 15:02:28 2020 -0500
  91. 9603f98 Workaround for Cortex A76 erratum 1791580 by johpow01 · Fri May 29 14:17:38 2020 -0500
  92. 9223485 Prevent RAS register access from lower ELs by Varun Wadekar · Fri Jun 12 10:11:28 2020 -0700
  93. 70f6597 Tegra194: add RAS exception handling by David Pu · Mon Mar 18 15:14:49 2019 -0700
  94. 88d0f06 cpus: denver: disable cycle counter when event counting is prohibited by Varun Wadekar · Sun May 24 16:26:22 2020 -0700
  95. 0a65884 cert_create: add SiP owned secure partitions support by Manish Pandey · Fri May 22 12:27:28 2020 +0100
  96. 398c2c7 Merge "Rename Cortex-Hercules to Cortex-A78" into integration by Madhukar Pappireddy · Wed Jun 03 19:26:34 2020 +0000
  97. 83d6461 Merge "Rename Cortex Hercules Files to Cortex A78" into integration by Madhukar Pappireddy · Wed Jun 03 19:26:08 2020 +0000
  98. 8357389 Enable ARMv8.6-ECV Self-Synch when booting to EL2 by Jimmy Brisson · Thu Apr 16 10:48:02 2020 -0500
  99. ecc3c67 Enable ARMv8.6-FGT when booting to EL2 by Jimmy Brisson · Thu Apr 16 10:47:56 2020 -0500
  100. 3571fb9 Rename Cortex-Hercules to Cortex-A78 by Jimmy Brisson · Mon Jun 01 10:18:22 2020 -0500