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git01.mediatek.com / filogic / atf / 260935ec5385d2a86833d9d970315159c22bf0be
  1. e9a0d11 Eliminate psci_suspend_context array by Andrew Thoelke · 10 years ago
  2. 4e12607 Initialise CPU contexts from entry_point_info by Andrew Thoelke · 10 years ago
  3. f1c7cd7 Merge pull request #143 from athoelke/at/remove-nsram by danh-arm · 10 years ago
  4. 4af473c Merge pull request #140 from athoelke/at/psci_smc_handler by danh-arm · 10 years ago
  5. 47e74a8 Compile with '-Wmissing-include-dirs' flag by Sandrine Bailleux · 10 years ago
  6. 40110f7 Merge pull request #138 from athoelke/at/cpu-context by danh-arm · 10 years ago
  7. 37db22d Merge pull request #137 from athoelke/at/no-early-exceptions by danh-arm · 10 years ago
  8. fb3fd02 Merge pull request #136 from athoelke/at/cpu-data by danh-arm · 10 years ago
  9. 10ee89f Merge pull request #142 from athoelke/at/fix-console_putc by danh-arm · 10 years ago
  10. 30b04fc Remove NSRAM from FVP memory map by Andrew Thoelke · 10 years ago
  11. 560a3e5 Remove broken assertion in console_putc() by Andrew Thoelke · 10 years ago
  12. 900def0 Merge pull request #135 from soby-mathew/sm/remove-reinit-of-timers by danh-arm · 10 years ago
  13. bb12891 Remove re-initialisation of system timers after warm boot for FVP by Soby Mathew · 10 years ago
  14. 0572273 Merge pull request #134 from jcastillo-arm/jc/tf-issues/179 by danh-arm · 10 years ago
  15. 4d2d553 Remove early_exceptions from BL3-1 by Andrew Thoelke · 10 years ago
  16. c02dbd6 Move CPU context pointers into cpu_data by Andrew Thoelke · 10 years ago
  17. 8c28fe0 Per-cpu data cache restructuring by Andrew Thoelke · 10 years ago
  18. d73898a Set correct value for SYS_ID_REV_SHIFT in FVP by Juan Castillo · 10 years ago
  19. e385767 Merge pull request #133 from athoelke/at/crash-reporting-opt by danh-arm · 10 years ago
  20. d25686a Merge pull request #131 from athoelke/at/cm_get_context by danh-arm · 10 years ago
  21. ddb312d Merge pull request #130 from athoelke/at/inline-asm-sysreg-v2 by danh-arm · 10 years ago
  22. 14f6fa0 Merge pull request #128 from sandrine-bailleux/sb/make-load_image-ep-optional by danh-arm · 10 years ago
  23. 978079b Merge pull request #127 from sandrine-bailleux/sb/fix-pl011-fifo-polling by achingupta · 10 years ago
  24. 992d045 Merge pull request #126 from sandrine-bailleux/sb/include-missing-hfile by achingupta · 10 years ago
  25. fdad706 Merge pull request #125 from sandrine-bailleux/sb/remove-bl2_el_change_mem_ptr by achingupta · 10 years ago
  26. 385f4d4 Make the BL3-1 crash reporting optional by Andrew Thoelke · 10 years ago
  27. a2f6553 Provide cm_get/set_context() for current CPU by Andrew Thoelke · 11 years ago
  28. 3785c3e Merge Pull Request #120 (patch 1) from 'linmaonly:lin_patch2' by Andrew Thoelke · 10 years ago
  29. 89a3c84 PSCI SMC handler improvements by Andrew Thoelke · 10 years ago
  30. 3f78dc3 Make system register functions inline assembly by Andrew Thoelke · 10 years ago
  31. 1c3e228 fvp: Remove unused 'bl2_el_change_mem_ptr' variable by Sandrine Bailleux · 10 years ago
  32. 3ab33f3 Make the entry point argument optional in load_image() by Sandrine Bailleux · 10 years ago
  33. efbd3b2 PL011: Fix a bug in the UART FIFO polling by Sandrine Bailleux · 10 years ago
  34. af1ef2b Include 'platform_def.h' header file in 'crash_reporting.S' by Sandrine Bailleux · 10 years ago
  35. 001f3cf Merge pull request #122 from 'danh-arm:dh/v0.4-docs' by Dan Handley · 10 years ago
  36. dbdb7ff Merge pull request #124 from 'danh-arm:sm/imf-documentation' by Dan Handley · 10 years ago
  37. b04412c Document design of the Interrupt Mangement Framework by Achin Gupta · 10 years ago
  38. 8dc1219 Merge pull request #119 from 'soby-mathew:sm/doc_crash_reporting' by Dan Handley · 10 years ago
  39. 593dea0 Merge pull request #117 from 'danh-arm:dh/v0.4-user-guide' by Dan Handley · 10 years ago
  40. c677812 Merge pull request #121 'vikramkanigiri:vk/doc_for_133' by Dan Handley · 10 years ago
  41. c45bf7a Documentation for BL3-1 hardening and reset vector by Vikram Kanigiri · 10 years ago
  42. ff1c415 Trusted Firmware v0.4 release documentation by Dan Handley · 10 years ago
  43. 3761028 User guide updates for v0.4 release by Dan Handley · 10 years ago
  44. 1359236 Enable mapping higher physical address by Lin Ma · 10 years ago
  45. b3d30b7 Documentation for the new crash reporting implementation by Soby Mathew · 10 years ago
  46. c7388d3 Merge pull request #116 from 'danh-arm:dh/refactoring-docs' by Dan Handley · 10 years ago
  47. 0b314cc Fix porting guide references to platform.h by Dan Handley · 10 years ago
  48. df87323 Merge pull request #111 'soby-mathew-sm:fix_cookie_to_int_handler' by Dan Handley · 10 years ago
  49. b86acb0 Merge pull request #115 'athoelke-at:fix-bl31-X1-parameter' by Dan Handley · 10 years ago
  50. b8b9002 Merge pull request #114 from 'vikramkanigiri:vk/pass_bl33_args' by Dan Handley · 10 years ago
  51. 93c89ec Fix compilation issue for IMF_READ_INTERRUPT_ID build flag by Soby Mathew · 10 years ago
  52. 799f0ab Pass 'cookie' parameter to interrupt handler in BL3-1 by Soby Mathew · 10 years ago
  53. a55566d Allow platform parameter X1 to be passed to BL3-1 by Andrew Thoelke · 10 years ago
  54. 614f395 Pass the args to the BL3-3 entrypoint by Vikram Kanigiri · 10 years ago
  55. 459df4c Merge pull request #110 from soby-mathew:sm/support_normal_irq_in_tsp-v4 into for-v0.4 by Dan Handley · 10 years ago
  56. 10e2df2 Merge pull request #112 from danh-arm:dh/refactor-plat-header-v4 into for-v0.4 by Dan Handley · 10 years ago
  57. 701fea7 Further renames of platform porting functions by Dan Handley · 10 years ago
  58. 2159ef4 Remove FVP specific comments in platform.h by Dan Handley · 10 years ago
  59. 3d57851 Fixup Standard SMC Resume Handling by Soby Mathew · 10 years ago
  60. b226a4d Add enable mmu platform porting interfaces by Dan Handley · 11 years ago
  61. ea45157 Rename FVP specific files and functions by Dan Handley · 11 years ago
  62. 7ce42df Move BL porting functions into platform.h by Dan Handley · 11 years ago
  63. ed6ff95 Split platform.h into separate headers by Dan Handley · 11 years ago
  64. 60b13e3 Remove unused data declarations by Dan Handley · 11 years ago
  65. a17fefa Remove extern keyword from function declarations by Dan Handley · 11 years ago
  66. 335bf58 Merge pull request #101 from sandrine-bailleux:sb/tf-issue-81-v2 by Andrew Thoelke · 10 years ago
  67. 5e9b3ab doc: Update information about the memory layout by Sandrine Bailleux · 10 years ago
  68. 6c8b359 Make the memory layout more flexible by Sandrine Bailleux · 10 years ago
  69. f748806 Make BL1 RO and RW base addresses configurable by Sandrine Bailleux · 10 years ago
  70. 332ff85 Merge pull request #104 from athoelke:at/tsp-entrypoints-v2 by Andrew Thoelke · 10 years ago
  71. 077193f Merge pull request #105 from athoelke:sm/support_normal_irq_in_tsp-v2 by Andrew Thoelke · 10 years ago
  72. 58484d4 Merge pull request #102 from achingupta:ag/tf-issues#104-v2 by Andrew Thoelke · 10 years ago
  73. 31f0f8f Merge pull request #100 from jcastillo-arm:jc/tf-issues/149-v4 by Andrew Thoelke · 10 years ago
  74. 44a07af Merge pull request #101 from sandrine-bailleux:sb/tf-issue-81-v2 by Andrew Thoelke · 10 years ago
  75. a83a38c Merge pull request #103 from athoelke:dh/tf-issues#68-v3 by Andrew Thoelke · 10 years ago
  76. 29c7ae1 Merge pull request #99 from vikramkanigiri:vk/tf-issues-133_V3 by Andrew Thoelke · 10 years ago
  77. 1c5630d Merge pull request #67 from achingupta:ag/psci_standby_bug_fix by Andrew Thoelke · 10 years ago
  78. aaa6ff8 Limit BL3-1 read/write access to SRAM by Andrew Thoelke · 10 years ago
  79. 891c4ca Use a vector table for TSP entrypoints by Andrew Thoelke · 10 years ago
  80. 9f71f70 Non-Secure Interrupt support during Standard SMC processing in TSP by Soby Mathew · 11 years ago
  81. 21a30ab Allow BL3-2 platform definitions to be optional by Dan Handley · 11 years ago
  82. bbc33f2 Enable secure timer to generate S-EL1 interrupts by Achin Gupta · 11 years ago
  83. aeaab68 Add S-EL1 interrupt handling support in the TSPD by Achin Gupta · 11 years ago
  84. a4f50c2 Add support for asynchronous FIQ handling in TSP by Achin Gupta · 11 years ago
  85. 7671789 Add support for synchronous FIQ handling in TSP by Achin Gupta · 11 years ago
  86. 405406d Use secure timer to generate S-EL1 interrupts by Achin Gupta · 11 years ago
  87. 9cf2bb7 Introduce interrupt handling framework in BL3-1 by Achin Gupta · 11 years ago
  88. 02d3628 Introduce platform api to access an ARM GIC by Achin Gupta · 11 years ago
  89. 191e86e Introduce interrupt registration framework in BL3-1 by Achin Gupta · 11 years ago
  90. 27b895e Add context library API to change a bit in SCR_EL3 by Achin Gupta · 11 years ago
  91. 18d6eaf Rework 'state' field usage in per-cpu TSP context by Achin Gupta · 11 years ago
  92. fcf9765 Doc: Add the "Building the Test Secure Payload" section by Sandrine Bailleux · 11 years ago
  93. e701e30 fvp: Move TSP from Secure DRAM to Secure SRAM by Sandrine Bailleux · 10 years ago
  94. 5ac3cc9 TSP: Let the platform decide which secure memory to use by Sandrine Bailleux · 10 years ago
  95. 7055ca4 Reserve some DDR DRAM for secure use on FVP platforms by Juan Castillo · 11 years ago
  96. 9637745 Add support for BL3-1 as a reset vector by Vikram Kanigiri · 11 years ago
  97. d8c9d26 Rework memory information passing to BL3-x images by Vikram Kanigiri · 11 years ago
  98. da56743 Populate BL31 input parameters as per new spec by Vikram Kanigiri · 11 years ago
  99. a3a5e4a Rework handover interface between BL stages by Vikram Kanigiri · 11 years ago
  100. 9851e42 Introduce macros to manipulate the SPSR by Vikram Kanigiri · 11 years ago