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git01.mediatek.com / filogic / atf / 21d8eb948ac7205ec26405addd066e61a8042eb0 / drivers / marvell
  1. 2be03c0 fix(tree): correct some typos by Elyes Haouas · Mon Feb 13 09:14:48 2023 +0100
  2. 1132db8 refactor(drivers/marvell/comphy-3700): rename Clock Source Low value constants by Marek Behún · Wed Dec 08 01:33:38 2021 +0100
  3. b531ca7 refactor(drivers/marvell/comphy-3700): rename Clock Source Low register constants by Marek Behún · Wed Dec 08 01:29:50 2021 +0100
  4. e58e733 refactor(drivers/marvell/comphy-3700): rename Reset and Clock Control register constants by Marek Behún · Wed Dec 08 01:27:38 2021 +0100
  5. d6d3247 refactor(drivers/marvell/comphy-3700): rename Lane Status 1 register constants by Marek Behún · Wed Dec 08 01:24:36 2021 +0100
  6. d0da334 refactor(drivers/marvell/comphy-3700): rename Miscellaneous Control register constants by Marek Behún · Wed Dec 08 01:20:50 2021 +0100
  7. 6355cdb refactor(drivers/marvell/comphy-3700): rename Idle Sync Enable register constants by Marek Behún · Wed Dec 08 00:15:29 2021 +0100
  8. 5a90dc3 refactor(drivers/marvell/comphy-3700): unify Generation Settings register values by Marek Behún · Wed Dec 08 01:12:00 2021 +0100
  9. ff8afbe refactor(drivers/marvell/comphy-3700): unify Generation Settings register names by Marek Behún · Wed Dec 08 00:52:28 2021 +0100
  10. 781babd4 refactor(drivers/marvell/comphy-3700): drop _ADDR suffixes by Marek Behún · Wed Dec 08 00:46:00 2021 +0100
  11. 0284c8a refactor(drivers/marvell/comphy-3700): drop _REG prefixes and suffixes by Marek Behún · Wed Dec 08 00:37:34 2021 +0100
  12. 4457e65b refactor(drivers/marvell/comphy-3700): move and add comment for COMPHY_RESERVED_REG by Marek Behún · Thu Dec 02 20:04:57 2021 +0100
  13. 88315c5 refactor(drivers/marvell/comphy-3700): move Miscellaneous Control 0 register definition by Marek Behún · Thu Dec 02 20:29:30 2021 +0100
  14. 9a0e4d9 refactor(drivers/marvell/comphy-3700): rename PHY_GEN_USB3_5G to PHY_GEN_MAX_USB3_5G by Marek Behún · Wed Dec 01 13:45:42 2021 +0100
  15. fc38732 refactor(drivers/marvell/comphy-3700): rename Digital Loopback Enable register constant by Marek Behún · Tue Dec 07 23:59:30 2021 +0100
  16. c8b27ce fix(drivers/marvell/comphy): change reg_set() / reg_set16() to update semantics by Marek Behún · Wed Dec 01 18:11:44 2021 +0100
  17. 96ea8fe fix(drivers/marvell/comphy-3700): use reg_set() according to update semantics by Marek Behún · Wed Dec 01 18:03:09 2021 +0100
  18. bca8b6c fix(drivers/marvell/comphy-3700): fix comments about selector register values by Marek Behún · Thu Dec 02 19:23:09 2021 +0100
  19. 593edd5 fix(drivers/marvell/comphy-3700): fix comment about COMPHY status register by Marek Behún · Thu Dec 02 19:14:37 2021 +0100
  20. da9b3d5 fix(drivers/marvell/comphy-3700): fix reference clock selection value names by Marek Behún · Wed Dec 01 13:23:11 2021 +0100
  21. 126f457 fix(drivers/marvell/comphy-3700): drop MODE_REFDIV constant by Marek Behún · Wed Dec 01 17:36:46 2021 +0100
  22. d2a1c03 fix(drivers/marvell/comphy-3700): fix SerDes frequency register value name by Marek Behún · Wed Dec 01 14:01:13 2021 +0100
  23. 71d145e fix(drivers/marvell/comphy-3700): fix Generation Setting registers names by Marek Behún · Wed Dec 01 12:39:10 2021 +0100
  24. c823712 fix(drivers/marvell/comphy-3700): fix PIN_PU_IVREF register name by Marek Behún · Tue Dec 07 23:26:17 2021 +0100
  25. 82602c9 fix(plat/marvell/a3720/uart): do external reset during initialization by Pali Rohár · Mon Nov 15 12:24:56 2021 +0100
  26. f658b89 fix(plat/marvell/a3720/uart): configure UART after TX FIFO reset by Pali Rohár · Mon Nov 15 10:53:21 2021 +0100
  27. 622d5da feat(plat/marvell/a3720/uart): preserve x1/x2 regs in console_a3700_core_init() by Pali Rohár · Mon Nov 15 10:51:28 2021 +0100
  28. e5dcf98 fix: libc: use long for 64-bit types on aarch64 by Scott Branden · Tue Aug 25 13:49:32 2020 -0700
  29. 6e150d1 fix(drivers/marvell/comphy-3700): configure phy selector also for PCIe by Pali Rohár · Tue Oct 12 14:53:25 2021 +0200
  30. 2f4d69d fix(drivers/marvell/comphy-cp110): fix error code in pcie power on by Pali Rohár · Fri Sep 24 14:43:54 2021 +0200
  31. 26a9862 fix(drivers/marvell/comphy-3700): handle failures in power functions by Pali Rohár · Thu Sep 23 14:47:18 2021 +0200
  32. c335e37 fix(drivers/marvell/comphy-3700): fix address overflow by Pali Rohár · Thu Sep 23 18:19:24 2021 +0200
  33. 58e9925 refactor(drivers/marvell/comphy-3700): simplify usage of comphy_sgmii_phy_init() by Pali Rohár · Thu Sep 23 15:08:00 2021 +0200
  34. 15b183c refactor(drivers/marvell/comphy-3700): simplify usage of indirect access on lane2 by Pali Rohár · Thu Sep 23 14:11:25 2021 +0200
  35. 754cec9 refactor(drivers/marvell/comphy-3700): simplify usage of sata power off by Pali Rohár · Thu Sep 23 12:33:42 2021 +0200
  36. 51974d2 fix(drivers/marvell/comphy): fix name of 3.125G SerDes mode by Pali Rohár · Fri Aug 27 11:16:43 2021 +0200
  37. a1b3ee0 Merge "fix(plat/marvell/armada): select correct pcie reference clock source" into integration by Manish Pandey · Mon Jun 07 15:45:30 2021 +0200
  38. 52c1de5 fix(plat/marvell/a3720/uart): fix UART parent clock rate determination by Pali Rohár · Fri May 14 15:52:11 2021 +0200
  39. 4ad4313 fix(plat/marvell/armada): select correct pcie reference clock source by Guo Yi · Thu Dec 17 22:30:54 2020 +0000
  40. fee856d fix(plat/marvell/a3720/uart): fix configuring UART clock by Pali Rohár · Thu May 13 15:11:06 2021 +0200
  41. 2666c1e fix(plat/marvell/a3720/uart): fix UART clock rate value and divisor calculation by Pali Rohár · Thu May 13 14:53:44 2021 +0200
  42. 2eb9804 drivers/marvell: check if TRNG unit is present by Konstantin Porotchkin · Sun Mar 07 13:48:21 2021 +0200
  43. b0a7430 drivers: marvell: comphy: add rx training on 10G port by Alex Evraev · Wed Jun 24 22:24:56 2020 +0300
  44. 2309961 plat/marvell/armada: allow builds without MSS support by Konstantin Porotchkin · Mon Oct 12 18:13:07 2020 +0300
  45. e573623 drivers: marvell: misc-dfx: extend dfx whitelist by Grzegorz Jaszczyk · Wed Mar 18 18:07:37 2020 +0100
  46. 7d50972 drivers: marvell: add support for secure read/write of dfx register-set by Grzegorz Jaszczyk · Fri Jan 03 09:35:21 2020 +0100
  47. 6a99b19 ddr_phy: use smc calls to access ddr phy registers by Alex Leibovich · Wed Dec 25 09:22:48 2019 +0200
  48. 755f078 drivers: marvell: thermal: use dedicated function for thermal SiPs by Grzegorz Jaszczyk · Thu Jan 02 16:14:13 2020 +0100
  49. a3173d6 drivers: marvell: add thermal sensor driver and expose it via SIP service by Grzegorz Jaszczyk · Wed Dec 18 15:58:27 2019 +0100
  50. bcc4416b drivers: marvell: comphy-a3700: Set TXDCLK_2X_SEL bit during PCIe initialization by Pali Rohár · Wed Mar 24 17:03:43 2021 +0100
  51. c9ae236 drivers: marvell: comphy-a3700: Set mask parameter for every reg_set call by Pali Rohár · Wed Mar 24 16:40:46 2021 +0100
  52. 741f7d6 drivers: marvell: comphy-a3700: Fix configuring polarity invert bits by Pali Rohár · Wed Mar 24 16:34:45 2021 +0100
  53. bf244b6 Merge changes I23f600b5,Icf9ffdf2,Iee7a51d1,I99afc312,I4bf8e8c0, ... into integration by Manish Pandey · Thu Feb 25 10:43:35 2021 +0000
  54. c000296 marvell: uart: a3720: Increase TX FIFO EMPTY timeout from 2ms to 3ms by Pali Rohár · Tue Feb 16 11:56:24 2021 +0100
  55. 0247876 marvell: uart: a3720: Update delay code to be compatible with 1200 MHz CPU by Pali Rohár · Tue Feb 16 11:55:02 2021 +0100
  56. 46179c3 marvell: uart: a3720: Fix comments in console_a3700_core_init() function by Pali Rohár · Tue Feb 16 11:49:11 2021 +0100
  57. 1929cf2 marvell: drivers: move XOR0/1 DIOB from WIN 0 to 1 by Ofer Heifetz · Mon Dec 16 12:25:28 2019 +0200
  58. caf74ae drivers/marvell/mochi: add support for cn913x in PCIe EP mode by Konstantin Porotchkin · Tue Dec 17 16:09:00 2019 +0200
  59. 97fb758 drivers/marvell/mochi: add missing stream IDs configurations by Konstantin Porotchkin · Mon Oct 19 11:28:54 2020 +0300
  60. 7b9e4d4 plat/marvell/armada/a8k: support HW RNG by SMC by Konstantin Porotchkin · Sun Jul 26 17:49:54 2020 +0300
  61. 10d330f marvell: uart: a3720: Fix macro name for 6th bit of Status Register by Pali Rohár · Mon Jan 18 12:52:55 2021 +0100
  62. 6291f55 marvell: uart: a3720: Implement console_a3700_core_getc by Pali Rohár · Mon Jan 18 12:39:25 2021 +0100
  63. f758ceb marvell: uart: a3720: Implement console_a3700_core_flush by Pali Rohár · Wed Dec 23 19:23:26 2020 +0100
  64. 39f9eee Don't return error information from console_flush by Jimmy Brisson · Wed Aug 05 13:44:05 2020 -0500
  65. 78f8bec marvell: comphy: cp110: add support for USB comphy polarity invert by Grzegorz Jaszczyk · Tue Jan 21 17:02:29 2020 +0100
  66. ff9311b marvell: comphy: cp110: add support for SATA comphy polarity invert by Grzegorz Jaszczyk · Tue Jan 21 17:02:10 2020 +0100
  67. 779fd46 marvell: comphy: cp110: implement erratum IPCE_COMPHY-1353 by Marcin Wojtas · Mon Sep 09 03:38:18 2019 +0200
  68. 7a96a50 drivers: marvell: mochi: Update AP incoming masters secure level by Konstantin Porotchkin · Thu Aug 22 14:23:34 2019 +0300
  69. a0568b5 plat: marvell: armada: add ccu window for workaround errata-id 3033912 by Alex Leibovich · Wed Dec 25 09:11:38 2019 +0200
  70. 5dea947 plat: marvell: ap807: implement workaround for errata-id 3033912 by Stefan Chulski · Tue Jun 25 15:41:47 2019 +0300
  71. 1e1ab1d drivers: marvell: Fix the LLC SRAM driver by Konstantin Porotchkin · Thu Apr 04 10:02:20 2019 +0300
  72. c30b886 drivers: marvell: mg_conf_cm3: pass comphy lane number to AP FW by Grzegorz Jaszczyk · Tue Jun 18 14:43:02 2019 +0200
  73. 7588ae2 plat: marvell: armada: move mg conf related code to appropriate driver by Grzegorz Jaszczyk · Wed Apr 17 11:24:43 2019 +0200
  74. 1540ffb marvell: comphy: start AP FW when comphy AP mode selected by Grzegorz Jaszczyk · Fri Apr 12 16:57:14 2019 +0200
  75. 65b9afa drivers: marvell: mg_conf_cm3: add basic driver by Grzegorz Jaszczyk · Fri Apr 12 16:53:49 2019 +0200
  76. 2ef36a3 drivers: marvell: add support for mapping the entire LLC to SRAM by Konstantin Porotchkin · Sun Mar 31 16:58:11 2019 +0300
  77. 06f4dd0 drivers: marvell: add CCU driver API for window state checking by Konstantin Porotchkin · Sun Mar 31 17:20:19 2019 +0300
  78. fa8c130 drivers: marvell: align and extend llc macros by Konstantin Porotchkin · Mon Mar 25 15:35:41 2019 +0200
  79. 7a61f16 marvell: comphy: initialize common phy selector for AP mode by Grzegorz Jaszczyk · Thu Mar 28 13:02:42 2019 +0100
  80. 3eb5e40 marvell: comphy: update rx_training procedure by Grzegorz Jaszczyk · Fri Mar 08 19:51:21 2019 +0100
  81. c035d9d ble: ap807: improve PLL configuration sequence by Alex Leibovich · Mon Feb 25 13:13:48 2019 +0200
  82. 605162e ble: ap807: clean-up PLL configuration sequence by Alex Leibovich · Sun Feb 10 15:08:25 2019 +0200
  83. 582fdfd plat: marvell: mci: perform mci link tuning for all mci interfaces by Grzegorz Jaszczyk · Wed Feb 06 14:16:51 2019 +0100
  84. 106eb82 plat: marvell: mci: use more meaningful name for mci link tuning by Grzegorz Jaszczyk · Thu Feb 07 15:15:14 2019 +0100
  85. 02721c7 plat: marvell: ap807: update configuration space of each CP by Grzegorz Jaszczyk · Sun Jan 13 17:33:45 2019 +0200
  86. d57c5f0 plat: marvell: ap807: use correct address for MCIx4 register by Grzegorz Jaszczyk · Sun Jan 13 15:29:10 2019 +0200
  87. a5d0627 plat: marvell: add support for PLL 2.2GHz mode by Grzegorz Jaszczyk · Thu Dec 20 17:13:19 2018 +0100
  88. 3039bce marvell: armada: add extra level in marvell platform hierarchy by Grzegorz Jaszczyk · Tue Nov 05 13:14:59 2019 +0100
  89. fadde2b marvell: drivers: mochi: specify stream ID for SD/MMC by Marcin Wojtas · Tue May 12 18:19:33 2020 +0200
  90. 0342f40 a3700: Use generic console_t data structure by Andre Przywara · Sat Jan 25 00:58:35 2020 +0000
  91. 17e43dd plat: marvell: armada: add support for loading MG CM3 images by Grzegorz Jaszczyk · Fri Aug 18 16:42:12 2017 +0200
  92. 4f94cbc drivers: marvell: comphy-a3700: support SGMII COMPHY power off by Marek Behún · Tue Nov 05 15:21:54 2019 +0100
  93. 718e02c drivers: marvell: comphy-a3700: fix USB3 powering on when on lane 2 by Marek Behún · Tue Oct 08 17:36:14 2019 +0200
  94. fed41a1 Update marvell platform to not rely on undefined overflow behaviour by Justin Chadwell · Wed Jul 03 14:04:33 2019 +0100
  95. 0a0ca8b Console: remove deprecated finish_console_register by Ambroise Vincent · Wed Mar 27 15:45:35 2019 +0000
  96. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · Fri Dec 14 00:18:21 2018 +0000
  97. 9a772df ble: ap807: Switch to PLL mode and update CPU frequency by Christine Gharzuzi · Mon Jun 25 13:39:37 2018 +0300
  98. bd51efd mvebu: cp110: avoid pcie power on/off sequence when called from Linux by Igal Liberman · Thu Nov 15 16:13:11 2018 +0200
  99. 05b1773 mvebu: cp110: fix phy selector configuration for XFI1 by Grzegorz Jaszczyk · Fri Oct 19 15:30:02 2018 +0200
  100. d8e3957 plat/marvell: Migrate to multi-console API by Konstantin Porotchkin · Wed Nov 14 17:15:08 2018 +0200