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git01.mediatek.com / filogic / atf / 20df29c46c46756cd54f0fe702b6bf099ceed08e / include / arch / aarch64 / arch.h
  1. 20df29c feat(trbe): enable access to trace buffer control registers from lower NS EL by Manish V Badarkhe · 3 years ago
  2. e1cccb4 feat(trbe): initialize trap settings of trace buffer control registers access by Manish V Badarkhe · 3 years ago
  3. 44b4333 fix(sdei): set SPSR for SDEI based on TakeException by Daniel Boulby · 3 years, 7 months ago
  4. c450277 feat(sve): enable SVE for the secure world by Max Shvetsov · 3 years, 3 months ago
  5. 307f34b fix(security): Set MDCR_EL3.MCCD bit by Alexei Fedorov · 3 years, 2 months ago
  6. fa59c6f Enable v8.6 AMU enhancements (FEAT_AMUv1p1) by johpow01 · 3 years, 9 months ago
  7. 6fd816e Define registers for FEAT_RNG support by Tomas Pilar · 3 years, 8 months ago
  8. f3a4c54 Add support for FEAT_MTPMU for Armv8.6 by Javier Almansa Sobrino · 3 years, 7 months ago
  9. 9ecc255 Merge "Aarch64: Add support for FEAT_PANx extensions" into integration by Manish Pandey · 3 years, 7 months ago
  10. af54f6e Aarch64: Add support for FEAT_MTE3 by Alexei Fedorov · 3 years, 7 months ago
  11. c082f03 Aarch64: Add support for FEAT_PANx extensions by Alexei Fedorov · 3 years, 7 months ago
  12. ed20207 Increase type widths to satisfy width requirements by Jimmy Brisson · 4 years ago
  13. 7e6306b TF-A AMU extension: fix detection of group 1 counters. by Alexei Fedorov · 4 years ago
  14. 9223485 Prevent RAS register access from lower ELs by Varun Wadekar · 4 years, 1 month ago
  15. 8357389 Enable ARMv8.6-ECV Self-Synch when booting to EL2 by Jimmy Brisson · 4 years, 3 months ago
  16. ecc3c67 Enable ARMv8.6-FGT when booting to EL2 by Jimmy Brisson · 4 years, 3 months ago
  17. 1993355 TF-A: Fix wrong register read for MPAM extension by Alexei Fedorov · 4 years, 1 month ago
  18. 3e24c16 Enable v8.6 WFE trap delays by johpow01 · 4 years, 2 months ago
  19. 2801ed4 Implement workaround for AT speculative behaviour by Manish V Badarkhe · 4 years, 2 months ago
  20. 90d6532 Provide a hint to power controller for DSU cluster power down by Madhukar Pappireddy · 4 years, 8 months ago
  21. a5c6636 Fix MISRA C issues in BL1/BL2/BL31 by John Powell · 4 years, 3 months ago
  22. 813c9f9 Fix crash dump for lower EL by Alexei Fedorov · 4 years, 4 months ago
  23. c9e2c92 SPMD: Adds partially supported EL2 registers. by Max Shvetsov · 4 years, 5 months ago
  24. bdf502d SPMD: save/restore EL2 system registers. by Max Shvetsov · 4 years, 4 months ago
  25. 787a129 Tegra: delay_timer: support for physical secure timer by Varun Wadekar · 6 years ago
  26. a533447 S-EL2 Support: Check for AArch64 by Artsem Artsemenka · 4 years, 7 months ago
  27. 023c155 Add support for enabling S-EL2 by Achin Gupta · 4 years, 9 months ago
  28. c235b12 Merge changes from topic "jc/mte_enable" into integration by Soby Mathew · 4 years, 10 months ago
  29. 83e0488 Add UBSAN support and handlers by Justin Chadwell · 4 years, 11 months ago
  30. 1c7c13a Enable MTE support in both secure and non-secure worlds by Justin Chadwell · 5 years ago
  31. c7a7cc3 Merge "AArch64: Disable Secure Cycle Counter" into integration by Paul Beesley · 4 years, 10 months ago
  32. 503bbf3 AArch64: Disable Secure Cycle Counter by Alexei Fedorov · 4 years, 11 months ago
  33. a95a589 FVP_Base_AEMv8A platform: Fix cache maintenance operations by Alexei Fedorov · 5 years ago
  34. c97455a Merge changes from topic "jts/spsr" into integration by Soby Mathew · 5 years ago
  35. 5553417 SSBS: init SPSR register with default SSBS value by John Tsichritzis · 5 years ago
  36. 4bf6afa Merge "Enable MTE support unilaterally for Normal World" into integration by Soby Mathew · 5 years ago
  37. 830f0ad Enable MTE support unilaterally for Normal World by Soby Mathew · 5 years ago
  38. c31ab38 Aarch64: Fix SCTLR bit definitions by Alexei Fedorov · 5 years ago
  39. 007d745 arch: add some defines for generic timer registers by Yann Gautier · 5 years ago
  40. 90f2e88 Add support for Branch Target Identification by Alexei Fedorov · 5 years ago
  41. 37f97a5 SPM: Move shim layer to TTBR1_EL1 by Antonio Nino Diaz · 5 years ago
  42. 1f9ff49 Apply variant 4 mitigation for Neoverse N1 by John Tsichritzis · 5 years ago
  43. f6505a7 Merge pull request #1845 from ambroise-arm/av/errata by Antonio Niño Díaz · 5 years ago
  44. 92cad35 Merge pull request #1846 from loumay-arm/lm/mpam by Antonio Niño Díaz · 5 years ago
  45. bdfa103 MPAM: enable MPAM EL2 traps by Louis Mayencourt · 5 years ago
  46. 23b7b69 Merge pull request #1839 from loumay-arm/lm/a7x_errata by Antonio Niño Díaz · 5 years ago
  47. f5fdfbc Cortex-A53: Workarounds for 819472, 824069 and 827319 by Ambroise Vincent · 5 years ago
  48. 594811b Add ARMv8.3-PAuth registers to CPU context by Antonio Nino Diaz · 5 years ago
  49. 78a0aed Add workaround for errata 764081 of Cortex-A75 by Louis Mayencourt · 5 years ago
  50. 3fbd3f5 Disable processor Cycle Counting in Secure state by Antonio Nino Diaz · 5 years ago
  51. 7415597 lib/xlat_tables: Add support for ARMv8.4-TTST by Sathees Balya · 5 years ago
  52. c326c34 xlat v2: Dynamically detect need for CnP bit by Antonio Nino Diaz · 5 years ago
  53. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · 6 years ago
  54. 8d1ade6 Reorganize architecture-dependent header files by Antonio Nino Diaz · 6 years ago[Renamed from include/lib/aarch64/arch.h]
  55. 0f3a004 Merge pull request #1731 from miyatsu/doc-fix-20181225 by Antonio Niño Díaz · 5 years ago