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filogic
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atf
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1adc5f5867c127c4b81cc97053e7fc3cf550833e
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lib
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cpus
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aarch32
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cortex_a72.S
e0f9063
Sanitise includes across codebase
by Antonio Nino Diaz
· 6 years ago
4a284a4
aarch32: Implement static workaround for CVE-2018-3639
by Dimitris Papastamos
· 6 years ago
04285cf
Merge pull request #1228 from dp-arm/dp/cve_2017_5715
by davidcunado-arm
· 7 years ago
e37c029
lib/cpus: fix branching in reset function for cortex-a72 AARCH32 mode
by Manoj Kumar
· 7 years ago
8ca0af2
Workaround for CVE-2017-5715 for Cortex A9, A15 and A17
by Dimitris Papastamos
· 7 years ago
41b0094
Replace macro ASM_ASSERTION with macro ENABLE_ASSERTIONS
by Matt Ma
· 7 years ago
c3b4ca1
Cortex-A72: Implement workaround for erratum 859971
by Eleanor Bonnici
· 7 years ago
41b61be
CPU: Correct names of implementation-defined aux regs
by Eleanor Bonnici
· 7 years ago
1384a16
Unique names for defines in the CPU libraries
by Varun Wadekar
· 7 years ago
fa3cf0b
Use SPDX license identifiers
by dp-arm
· 7 years ago
a9f776c
AArch32: Add support for ARM Cortex-A53/57/72 MPCore Processor
by Yatharth Kochar
· 8 years ago