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filogic
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atf
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1970fe20a447f043c2514cf5ad6470688bb73bb4
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bl31
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aarch64
b8f26e9
Make PAC demangling more generic
by Alexei Fedorov
· 4 years, 9 months ago
f4e6ea6
Changes necessary to support SEPARATE_NOBITS_REGION feature
by Madhukar Pappireddy
· 4 years, 10 months ago
0f7e601
Prevent speculative execution past ERET
by Anthony Steinhauser
· 4 years, 10 months ago
aa4fd60
Merge changes from topic "bs/pmf32" into integration
by György Szing
· 5 years ago
fa01598
aarch64: Fix stack pointer maintenance on EA handling path
by Jan Dabros
· 5 years ago
78dc10c
pmf: Make the runtime instrumentation work on AArch32
by Bence Szépkúti
· 5 years ago
c825768
PIE: make call to GDT relocation fixup generalized
by Manish Pandey
· 5 years ago
94accd3
Neoverse N1 Errata Workaround 1542419
by laurenw-arm
· 5 years ago
f41355c
Refactor ARMv8.3 Pointer Authentication support code
by Alexei Fedorov
· 5 years ago
83e0488
Add UBSAN support and handlers
by Justin Chadwell
· 5 years ago
7690382
Move assembly newline function into common debug code
by Justin Chadwell
· 5 years ago
c7a7cc3
Merge "AArch64: Disable Secure Cycle Counter" into integration
by Paul Beesley
· 5 years ago
503bbf3
AArch64: Disable Secure Cycle Counter
by Alexei Fedorov
· 5 years ago
c4dfb3b
AArch64: Align crash reporting output
by Alexei Fedorov
· 5 years ago
b5b903c
Fix BL31 crash reporting on AArch64 only machines
by Imre Kis
· 5 years ago
90f2e88
Add support for Branch Target Identification
by Alexei Fedorov
· 5 years ago
d87233a
Rework smc_unknown return code path in smc_handler
by Madhukar Pappireddy
· 6 years ago
dd894cc
Fix restoration of PAuth context
by Alexei Fedorov
· 6 years ago
81de7ab
PIE: Fix reloc at the beginning of bl31 entrypoint
by Louis Mayencourt
· 6 years ago
3287c4f
Restore PAuth context in case of unknown SMC call
by Alexei Fedorov
· 6 years ago
e71d26c
BL31: Enable pointer authentication support in warm boot path
by Alexei Fedorov
· 6 years ago
47a9064
BL31: Enable pointer authentication support
by Antonio Nino Diaz
· 6 years ago
25cda67
Add support for pointer authentication
by Antonio Nino Diaz
· 6 years ago
594811b
Add ARMv8.3-PAuth registers to CPU context
by Antonio Nino Diaz
· 6 years ago
0e402d3
Remove support for the SMC Calling Convention 2.0
by Antonio Nino Diaz
· 6 years ago
e0f9063
Sanitise includes across codebase
by Antonio Nino Diaz
· 6 years ago
f939a6a
SPM: Introduce SMC handlers for SPCI and SPRT
by Antonio Nino Diaz
· 6 years ago
d1198ad
BL31: Use helper function to save registers in SMC handler
by Soby Mathew
· 6 years ago
4e28c20
PIE: Position Independant Executable support for BL31
by Soby Mathew
· 6 years ago
f0b14cf
Remove some MISRA defects in common code
by Antonio Nino Diaz
· 6 years ago
911fcc9
RAS: Introduce handler for EL3 EAs
by Jeenu Viswambharan
· 6 years ago
93bc4bd
RAS: Introduce handler for Double Faults
by Jeenu Viswambharan
· 6 years ago
9d4c9c1
RAS: Introduce handler for Uncontainable errors
by Jeenu Viswambharan
· 6 years ago
476c29f
RAS: Validate stack pointer after error handling
by Jeenu Viswambharan
· 7 years ago
e86a247
RAS: Move EA handling to a separate file
by Jeenu Viswambharan
· 6 years ago
95f30ab
Add end_vector_entry assembler macro
by Roberto Vargas
· 7 years ago
e834ee1
DynamIQ: Enable MMU without using stack
by Jeenu Viswambharan
· 7 years ago
9a7ce2f
AArch64: Introduce RAS handling
by Jeenu Viswambharan
· 7 years ago
96c7df0
AArch64: Introduce External Abort handling
by Jeenu Viswambharan
· 7 years ago
23d05a8
AArch64: Refactor GP register restore to separate function
by Jeenu Viswambharan
· 7 years ago
35c8cfc
Add support for the SMC Calling Convention 2.0
by Antonio Nino Diaz
· 7 years ago
9c274f8
Merge pull request #1286 from antonio-nino-diaz-arm/an/mmu-mismatch
by davidcunado-arm
· 7 years ago
7c2a3ca
Add comments about mismatched TCR_ELx and xlat tables
by Antonio Nino Diaz
· 7 years ago
73308d0
Introduce the new BL handover interface
by Soby Mathew
· 7 years ago
e4794b7
Redefine SMC_UNK as -1 instead of 0xFFFFFFFF
by Antonio Nino Diaz
· 7 years ago
0415951
runtime_exceptions: Save x4-x29 unconditionally
by Dimitris Papastamos
· 7 years ago
d79d40d
Merge pull request #1193 from jwerner-chromium/JW_coreboot
by davidcunado-arm
· 7 years ago
446f7f1
Workaround for CVE-2017-5715 on Cortex A57 and A72
by Dimitris Papastamos
· 7 years ago
02eb727
utils_def: Add REGSZ and make BIT() assembly-compatible
by Julius Werner
· 7 years ago
d1a1fd4
Move FPEXC32_EL2 to FP Context
by David Cunado
· 7 years ago
67ebde7
Fix x30 reporting for unhandled exceptions
by Julius Werner
· 7 years ago
fee8653
Fully initialise essential control registers
by David Cunado
· 8 years ago
fa3cf0b
Use SPDX license identifiers
by dp-arm
· 8 years ago
043fe9c
PSCI: Build option to enable D-Caches early in warmboot
by Soby Mathew
· 8 years ago
d3ec543
Add and use plat_crash_console_flush() API
by Antonio Nino Diaz
· 8 years ago
1fecc8d
Merge pull request #860 from jeenu-arm/hw-asstd-coh
by davidcunado-arm
· 8 years ago
4ef91f1
Simplify translation tables headers dependencies
by Antonio Nino Diaz
· 8 years ago
4614496
Enable data caches early with hardware-assisted coherency
by Jeenu Viswambharan
· 8 years ago
68aef10
Define and use no_ret macro where no return is expected
by Jeenu Viswambharan
· 8 years ago
0980eed
Cosmetic change to exception table
by Douglas Raillard
· 8 years ago
3cac786
Add PMF instrumentation points in TF
by dp-arm
· 8 years ago
d019487
Introduce PSCI Library Interface
by Soby Mathew
· 9 years ago
0d78607
Introduce `el3_runtime` and `PSCI` libraries
by Soby Mathew
· 9 years ago
9e6ad6c
Introduce some helper macros for exception vectors
by Sandrine Bailleux
· 8 years ago
391a76e
Add 32 bit version of plat_get_syscnt_freq
by Antonio Nino Diaz
· 8 years ago
2c7ed5b
Dump platform-defined regs in crash reporting
by Gerald Lejeune
· 9 years ago
851dc7e
Add ISR_EL1 to crash report
by Gerald Lejeune
· 9 years ago
632d6df
Enable asynchronous abort exceptions during boot
by Gerald Lejeune
· 9 years ago
1f21bcf
Remove all non-configurable dead loops
by Antonio Nino Diaz
· 9 years ago
f4119ec
Miscellaneous doc fixes for v1.2
by Sandrine Bailleux
· 9 years ago
7d19941
Remove dashes from image names: 'BL3-x' --> 'BL3x'
by Juan Castillo
· 9 years ago
6c0566c
Move context management code to common location
by Yatharth Kochar
· 9 years ago
e77e116
Fix issue in Floating point register restore
by Soby Mathew
· 9 years ago
8f67649
Merge pull request #443 from achingupta/sb/el3_payloads-cb_single_cpu
by danh-arm
· 9 years ago
b21b02f
Introduce COLD_BOOT_SINGLE_CPU build option
by Sandrine Bailleux
· 9 years ago
c5204fa
Remove the IMF_READ_INTERRUPT_ID build option
by Soby Mathew
· 9 years ago
e9c4a64
Make generic code work in presence of system caches
by Achin Gupta
· 9 years ago
3700a92
PSCI: Migrate TF to the new platform API and CM helpers
by Soby Mathew
· 9 years ago
9ccbc03
Merge pull request #310 from sandrine-bailleux/sb/tf-issue-304-phase1
by danh-arm
· 9 years ago
449dbd5
Introduce PROGRAMMABLE_RESET_ADDRESS build option
by Sandrine Bailleux
· 9 years ago
acde8b0
Rationalize reset handling code
by Sandrine Bailleux
· 9 years ago
979992e
Fix handling of spurious interrupts in BL3_1
by Achin Gupta
· 10 years ago
a877c25
Add support to indicate size and end of assembly functions
by Kévin Petit
· 10 years ago
9b38fc8
Initialise cpu ops after enabling data cache
by Vikram Kanigiri
· 10 years ago
36433d1
Call reset handlers upon BL3-1 entry.
by Yatharth Kochar
· 10 years ago
2ae2043
Remove coherent memory from the BL memory maps
by Soby Mathew
· 10 years ago
046cd3f
Miscellaneous documentation fixes
by Sandrine Bailleux
· 10 years ago
38b4bc9
Add CPU specific crash reporting handlers
by Soby Mathew
· 10 years ago
8e2f287
Add CPU specific power management operations
by Soby Mathew
· 10 years ago
c704cbc
Introduce framework for CPU specific operations
by Soby Mathew
· 10 years ago
ed1744e
Unmask SError interrupt and clear SCR_EL3.EA bit
by Achin Gupta
· 10 years ago
534ae7f
Merge pull request #179 from jcastillo-arm/jc/tf-issues/219
by danh-arm
· 10 years ago
b3dbeb0
Call platform_is_primary_cpu() only from reset handler
by Juan Castillo
· 10 years ago
2ed46e9
Optimize EL3 register state stored in cpu_context structure
by Soby Mathew
· 10 years ago
45c31c4
Merge pull request #172 from soby-mathew/sm/asm_assert
by danh-arm
· 10 years ago
0da9593
Add CPUECTLR_EL1 and Snoop Control register to crash reporting
by Soby Mathew
· 10 years ago
c1adbbc
Rework the crash reporting in BL3-1 to use less stack
by Soby Mathew
· 10 years ago
9f09835
Simplify management of SCTLR_EL3 and SCTLR_EL1
by Achin Gupta
· 10 years ago
e1aa516
Remove coherent stack usage from the warm boot path
by Achin Gupta
· 10 years ago
f4a9709
Remove coherent stack usage from the cold boot path
by Achin Gupta
· 10 years ago
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