- d6cede3 Merge "feat(intel): enable SDMMC frontdoor load for ATF->Linux" into integration by Sandrine Bailleux · 10 months ago
- c271599 feat(intel): enable query of fip offset on RSU by Mahesh Rao · 1 year, 3 months ago
- 477aef4 feat(intel): support wipe DDR after calibration by Jit Loon Lim · 1 year, 3 months ago
- c5a3e3a feat(intel): enable SDMMC frontdoor load for ATF->Linux by Jit Loon Lim · 1 year, 1 month ago
- ef2b295 chore: remove MULTI_CONSOLE_API references by Michal Simek · 1 year, 2 months ago
- 11b9b49 refactor(build): distinguish BL2 as TF-A entry point and BL2 running at EL3 by Arvind Ram Prakash · 2 years ago
- 55803a2 fix(intel): fix UART baud rate and clock by Sieu Mun Tang · 2 years, 4 months ago
- dc2daae build(agilex): platform changes for verifying gpt header crc by Rohit Ner · 2 years, 6 months ago
- 044ed48 feat(intel): support version 2 SiP SVC SMC function ID for non-mailbox commands by Sieu Mun Tang · 2 years, 6 months ago
- a4a4327 feat(intel): implement timer init divider via cpu frequency. (#1) by BenjaminLimJL · 2 years, 7 months ago
- 2f94ca4 feat(intel): enable firewall for OCRAM in BL31 by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 3 months ago
- 1205ef0 feat(intel): create source file for firewall configuration by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 3 months ago
- dbcc2cf fix(intel): fix ECC Double Bit Error handling by Sieu Mun Tang · 2 years, 8 months ago
- f3a5d02 build(intel): define a macro for SIMICS build by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 4 months ago
- 9f22cbf build(intel): initial commit for crypto driver by Sieu Mun Tang · 2 years, 8 months ago
- 6474096 intel: mailbox: Ensure time out duration is predictive by Chee Hong Ang · 4 years, 6 months ago
- 0ae8d9a intel: platform: Include GICv2 makefile by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 3 months ago
- fcbc33d plat: intel: set DRVSEL and SMPLSEL for DWMMC by Tien Hock Loh · 4 years, 6 months ago
- 8d9e891 intel: Enable EMAC PHY in Intel FPGA platform by Tien Hock, Loh · 5 years ago
- 36a9f30 intel: Add bridge control for FPGA reconfig by Hadi Asyrafi · 4 years, 11 months ago
- 8ebd237 intel: System Manager refactoring by Hadi Asyrafi · 4 years, 11 months ago
- 67cb0ea intel: Refactor reset manager driver by Hadi Asyrafi · 4 years, 11 months ago
- 5ae876f intel: Refactor common platform code [5/5] by Hadi Asyrafi · 5 years ago
- 4d9f395 intel: Refactor common platform code [4/5] by Hadi Asyrafi · 5 years ago
- 6f8a2b2 intel: Refactor common platform code [3/5] by Hadi Asyrafi · 5 years ago
- f0fa807 intel: Refactor common platform code [2/5] by Hadi Asyrafi · 5 years ago
- 9f5dfc9 intel: Refactor common platform code [1/5] by Hadi Asyrafi · 5 years ago
- 461f8f4 Invalidate dcache build option for bl2 entry at EL3 by Hadi Asyrafi · 5 years ago
- 309ac01 intel: Platform common code refactor by Hadi Asyrafi · 5 years ago
- 6a240c7 intel: Platform common code refactor by Hadi Asyrafi · 5 years ago
- 616da77 intel: Adds support for Agilex platform by Hadi Asyrafi · 5 years ago