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git01.mediatek.com / filogic / atf / 108e30b1fdaad2b82bfad05d944a1d25b6b591c0 / include / lib / el3_runtime / cpu_data.h
  1. b6301e6 feat(rme): add context management changes for FEAT_RME by Zelalem Aweke · 3 years, 4 months ago
  2. f57491e fix(el3_runtime): correct CASSERT for pauth by Olivier Deprez · 3 years, 3 months ago
  3. f41355c Refactor ARMv8.3 Pointer Authentication support code by Alexei Fedorov · 5 years ago
  4. 8e0ef0f Switch AARCH32/AARCH64 to __aarch64__ by Julius Werner · 5 years ago
  5. 53456fc Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__ by Julius Werner · 5 years ago
  6. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · 6 years ago
  7. 864ca6f context_mgmt: Fix MISRA defects by Antonio Nino Diaz · 6 years ago
  8. 9fe40fd Fix MISRA defects in workaround and errata framework by Antonio Nino Diaz · 6 years ago
  9. 0571270 Fix MISRA rule 8.4 in common code by Roberto Vargas · 7 years ago
  10. 10a6727 BL31: Introduce Exception Handling Framework by Jeenu Viswambharan · 7 years ago
  11. 43a4d57 Change sizeof to use type of struct not function by Joel Hutton · 7 years ago
  12. 97ad6ce cpu log buffer size depends on cache line size by Etienne Carriere · 7 years ago
  13. fa3cf0b Use SPDX license identifiers by dp-arm · 8 years ago
  14. 3cac786 Add PMF instrumentation points in TF by dp-arm · 8 years ago
  15. 748be1d AArch32: Add support in TF libraries by Soby Mathew · 9 years ago
  16. 0d78607 Introduce `el3_runtime` and `PSCI` libraries by Soby Mathew · 9 years ago[Renamed from include/bl31/cpu_data.h]
  17. 24ab34f Fix coding guideline warnings by Soby Mathew · 9 years ago
  18. a0fedc4 Rework type usage in Trusted Firmware by Soby Mathew · 8 years ago
  19. 3700a92 PSCI: Migrate TF to the new platform API and CM helpers by Soby Mathew · 9 years ago
  20. 85dbf5a PSCI: Add framework to handle composite power states by Soby Mathew · 10 years ago
  21. 9b38fc8 Initialise cpu ops after enabling data cache by Vikram Kanigiri · 10 years ago
  22. 523d633 Move bakery algorithm implementation out of coherent memory by Soby Mathew · 10 years ago
  23. 7d861ea Invalidate the dcache after initializing cpu-ops by Soby Mathew · 10 years ago
  24. c704cbc Introduce framework for CPU specific operations by Soby Mathew · 10 years ago
  25. f3ccbab Add PSCI service specific per-CPU data by Achin Gupta · 10 years ago
  26. e4b9fa4 Add macro to flush per-CPU data by Achin Gupta · 10 years ago
  27. c1adbbc Rework the crash reporting in BL3-1 to use less stack by Soby Mathew · 10 years ago
  28. c02dbd6 Move CPU context pointers into cpu_data by Andrew Thoelke · 10 years ago
  29. 8c28fe0 Per-cpu data cache restructuring by Andrew Thoelke · 10 years ago