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git01.mediatek.com / filogic / atf / 106437d7cd3bb188b5eb2715641dba93e86eabde / plat / intel / soc / common / socfpga_psci.c
  1. 9da7620 fix(intel): update boot scratch cold register to use cold 8 by Jit Loon Lim · Sat Jun 10 00:04:49 2023 +0800
  2. b24dddf feat(intel): cold/warm reset and smp support for Agilex5 SoC FPGA by Jit Loon Lim · Wed May 17 12:26:11 2023 +0800
  3. 86f6fb3 feat(intel): restructure sys mgr for Agilex by Jit Loon Lim · Wed May 17 12:26:11 2023 +0800
  4. 44c61fc fix(intel): update boot scratch to indicate to Uboot is PSCI ON by Jit Loon Lim · Thu Mar 02 13:38:53 2023 +0800
  5. dbcc2cf fix(intel): fix ECC Double Bit Error handling by Sieu Mun Tang · Mon Mar 07 12:13:04 2022 +0800
  6. d84bfef intel: Fix argument type for mailbox driver by Abdul Halim, Muhammad Hadi Asyrafi · Tue Feb 25 16:28:10 2020 +0800
  7. e59b999 intel: Fix Coverity Scan Defects by Abdul Halim, Muhammad Hadi Asyrafi · Tue Feb 11 20:17:05 2020 +0800
  8. 593c4c5 intel: Extend SiP service to support mailbox's RSU by Hadi Asyrafi · Tue Dec 17 19:22:17 2019 +0800
  9. 67cb0ea intel: Refactor reset manager driver by Hadi Asyrafi · Mon Dec 23 13:25:33 2019 +0800
  10. 5fae68f intel: Implement platform specific system reset 2 by Hadi Asyrafi · Tue Oct 22 14:23:57 2019 +0800
  11. a2edf0e intel: Modify BL31 address mapping by Hadi Asyrafi · Tue Oct 22 13:39:14 2019 +0800
  12. 4d9f395 intel: Refactor common platform code [4/5] by Hadi Asyrafi · Wed Oct 23 17:35:32 2019 +0800[Renamed (92%) from plat/intel/soc/agilex/socfpga_psci.c]
  13. 6f8a2b2 intel: Refactor common platform code [3/5] by Hadi Asyrafi · Wed Oct 23 18:34:14 2019 +0800
  14. 91071fc intel: agilex: Fix psci power domain off by Hadi Asyrafi · Thu Sep 12 15:14:01 2019 +0800
  15. 309ac01 intel: Platform common code refactor by Hadi Asyrafi · Thu Aug 01 14:48:39 2019 +0800
  16. 616da77 intel: Adds support for Agilex platform by Hadi Asyrafi · Thu Jun 27 11:34:03 2019 +0800