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cpus
4c24bb7
Merge pull request #1168 from matt2048/master
by davidcunado-arm
· Mon Dec 04 22:39:40 2017 +0000
fcedb69
Implement support for the Activity Monitor Unit on Cortex A75
by Dimitris Papastamos
· Mon Oct 16 11:40:10 2017 +0100
41b0094
Replace macro ASM_ASSERTION with macro ENABLE_ASSERTIONS
by Matt Ma
· Wed Nov 22 19:31:28 2017 +0800
09d26a6
ARMv7: introduce Cortex-A12
by Etienne Carriere
· Sun Nov 05 22:56:50 2017 +0100
010dd1f
ARMv7: introduce Cortex-A17
by Etienne Carriere
· Sun Nov 05 22:56:41 2017 +0100
f2f7b91
ARMv7: introduce Cortex-A7
by Etienne Carriere
· Sun Nov 05 22:56:34 2017 +0100
37f8cdc
ARMv7: introduce Cortex-A5
by Etienne Carriere
· Sun Nov 05 22:56:26 2017 +0100
a1249e0
ARMv7: introduce Cortex-A9
by Etienne Carriere
· Sun Nov 05 22:56:19 2017 +0100
4ece755
ARMv7: introduce Cortex-A15
by Etienne Carriere
· Sun Nov 05 22:56:10 2017 +0100
c3b4ca1
Cortex-A72: Implement workaround for erratum 859971
by Eleanor Bonnici
· Wed Aug 02 18:33:41 2017 +0100
0c9bd27
Cortex-A57: Implement workaround for erratum 859972
by Eleanor Bonnici
· Wed Aug 02 16:35:04 2017 +0100
41b61be
CPU: Correct names of implementation-defined aux regs
by Eleanor Bonnici
· Wed Aug 09 16:42:40 2017 +0100
9930501
Fix order of #includes
by Isla Mitchell
· Tue Jul 11 14:54:08 2017 +0100
d0c8273
Introduce TF_LDFLAGS
by Douglas Raillard
· Thu Jun 22 14:44:48 2017 +0100
505f467
Merge pull request #1002 from douglas-raillard-arm/dr/fix_errata_a53
by danh-arm
· Wed Jun 28 13:47:40 2017 +0100
8a354f1
Resolve signed-unsigned comparison issues
by David Cunado
· Wed Jun 21 16:52:45 2017 +0100
d56fb04
Apply workarounds for A53 Cat A Errata 835769 and 843419
by Douglas Raillard
· Mon Jun 19 15:38:02 2017 +0100
2b40ca6
aarch32: Implement errata workarounds for Cortex A57
by Dimitris Papastamos
· Mon Jun 05 14:55:41 2017 +0100
9c47a5a
aarch32: Implement errata workarounds for Cortex A53
by Dimitris Papastamos
· Mon Jun 05 13:37:25 2017 +0100
370542e
aarch32: Implement cpu_rev_var_hs()
by Dimitris Papastamos
· Mon Jun 05 13:36:34 2017 +0100
1384a16
Unique names for defines in the CPU libraries
by Varun Wadekar
· Mon Jun 05 14:54:46 2017 -0700
66231d1
Tegra: enable 'signed-comparison' compilation warning/errors
by Varun Wadekar
· Wed Jun 07 09:57:42 2017 -0700
805c2c7
Add support for Cortex-A75 and Cortex-A55 CPUs
by David Wang
· Wed Nov 09 16:29:02 2016 +0000
815faa8
Use a callee-saved register to be AAPCS-compliant
by dp-arm
· Fri May 05 12:21:03 2017 +0100
fa3cf0b
Use SPDX license identifiers
by dp-arm
· Wed May 03 09:38:09 2017 +0100
bf360df
Merge pull request #910 from dp-arm/dp/AArch32-juno-port
by davidcunado-arm
· Fri Apr 21 17:10:27 2017 +0100
a9f776c
AArch32: Add support for ARM Cortex-A53/57/72 MPCore Processor
by Yatharth Kochar
· Thu Nov 10 16:17:51 2016 +0000
7c65c1e
Remove build option `ASM_ASSERTION`
by Antonio Nino Diaz
· Thu Apr 20 09:58:28 2017 +0100
8cbdab2
Merge pull request #870 from douglas-raillard-arm/dr/remove_asm_signed_test
by davidcunado-arm
· Wed Mar 29 09:58:20 2017 +0100
00eefd9
Add workaround for ARM Cortex-A53 erratum 855873
by Andre Przywara
· Thu Oct 06 16:54:53 2016 +0100
9d92e8c
Replace ASM signed tests with unsigned
by Douglas Raillard
· Tue Mar 07 16:36:14 2017 +0000
c4364f6
Merge pull request #856 from antonio-nino-diaz-arm/an/dynamic-xlat
by davidcunado-arm
· Thu Mar 16 12:42:32 2017 +0000
3f13c35
Apply workaround for errata 813419 of Cortex-A57
by Antonio Nino Diaz
· Fri Feb 24 11:39:22 2017 +0000
0a7e27c
Merge pull request #853 from vwadekar/tegra-changes-from-downstream-v3
by davidcunado-arm
· Thu Mar 02 15:27:33 2017 +0000
8f87cc3
cpus: denver: remove barrier from denver_enable_dco()
by Varun Wadekar
· Fri May 06 16:35:30 2016 -0700
1cc176b
Merge pull request #848 from douglas-raillard-arm/dr/improve_errata_doc
by danh-arm
· Tue Feb 28 12:07:32 2017 +0000
d43583c
cpus: denver: disable DCO operations from platform code
by Varun Wadekar
· Mon Feb 22 11:09:41 2016 -0800
c847f66
Clarify errata ERRATA_A53_836870 documentation
by Douglas Raillard
· Wed Feb 15 17:38:43 2017 +0000
3c337a6
cpus: Add support for all Denver variants
by Varun Wadekar
· Thu Sep 03 17:15:06 2015 +0530
d5ec367
Report errata workaround status to console
by Jeenu Viswambharan
· Tue Jan 03 11:01:51 2017 +0000
441bfdd
Use #ifdef for IMAGE_BL* instead of #if
by Masahiro Yamada
· Sun Dec 25 23:36:24 2016 +0900
1f5f812
Correct system include order
by David Cunado
· Tue Jan 17 14:40:15 2017 +0000
ee5eb80
Add provision to extend CPU operations at more levels
by Jeenu Viswambharan
· Fri Nov 18 12:58:28 2016 +0000
adb7027
AArch32: Fix the stack alignment issue
by Soby Mathew
· Tue Dec 06 12:10:51 2016 +0000
a4c219a
AArch32: Add support for ARM Cortex-A32 MPCore Processor
by Yatharth Kochar
· Tue Jul 12 15:47:03 2016 +0100
f528faf
AArch32: Common changes needed for BL1/BL2
by Yatharth Kochar
· Tue Jun 28 16:58:26 2016 +0100
748be1d
AArch32: Add support in TF libraries
by Soby Mathew
· Thu May 05 14:10:46 2016 +0100
6a72a91
bl31: Add error reporting registers
by Naga Sureshkumar Relli
· Fri Jul 01 12:52:41 2016 +0530
63af687
Add support for ARM Cortex-A73 MPCore Processor
by Yatharth Kochar
· Tue Feb 09 12:00:03 2016 +0000
143ef1a
Add support for Cortex-A57 erratum 833471 workaround
by Sandrine Bailleux
· Thu Apr 21 11:10:52 2016 +0100
adcbd55
Add support for Cortex-A57 erratum 826977 workaround
by Sandrine Bailleux
· Thu Apr 14 14:24:13 2016 +0100
48cbe85
Add support for Cortex-A57 erratum 829520 workaround
by Sandrine Bailleux
· Thu Apr 14 14:18:07 2016 +0100
c11116f
Add support for Cortex-A57 erratum 828024 workaround
by Sandrine Bailleux
· Thu Apr 14 14:04:48 2016 +0100
a7e0c53
Add support for Cortex-A57 erratum 826974 workaround
by Sandrine Bailleux
· Thu Apr 14 13:32:31 2016 +0100
afa8a78
Fix wording in cpu-ops.mk comments
by Sandrine Bailleux
· Thu Apr 14 12:59:42 2016 +0100
6b28c57
Make cpu operations warning a VERBOSE print
by Soby Mathew
· Mon Mar 21 10:36:47 2016 +0000
f12a31d
Cortex-Axx: Unconditionally apply CPU reset operations
by Sandrine Bailleux
· Fri Jan 29 14:37:58 2016 +0000
d481759
Disable non-temporal hint on Cortex-A53/57
by Sandrine Bailleux
· Wed Jan 13 14:57:38 2016 +0000
432aa77
Add support for ARM Cortex-A35 processor
by Sandrine Bailleux
· Thu Jan 07 16:52:49 2016 +0000
4fceaca
cortex_a53: Add A53 errata #826319, #836870
by developer
· Wed Jul 29 20:55:31 2015 +0800
28463b9
Add "Project Denver" CPU support
by Varun Wadekar
· Tue Jul 14 17:11:20 2015 +0530
e364a8a
Fix recursive crash prints on FVP AEM model
by Soby Mathew
· Mon Apr 13 16:57:12 2015 +0100
a877c25
Add support to indicate size and end of assembly functions
by Kévin Petit
· Tue Mar 24 14:03:57 2015 +0000
632432b
Merge pull request #270 from vikramkanigiri/vk/a72_cpu_support
by danh-arm
· Thu Mar 19 19:33:06 2015 +0000
c47e011
Add support for ARM Cortex-A72 processor
by Vikram Kanigiri
· Tue Feb 17 11:50:28 2015 +0000
9b38fc8
Initialise cpu ops after enabling data cache
by Vikram Kanigiri
· Thu Jan 29 18:27:38 2015 +0000
b5a6304
Fix the Cortex-A57 reset handler register usage
by Soby Mathew
· Thu Jan 29 12:00:58 2015 +0000
36433d1
Call reset handlers upon BL3-1 entry.
by Yatharth Kochar
· Thu Nov 20 18:09:41 2014 +0000
7d861ea
Invalidate the dcache after initializing cpu-ops
by Soby Mathew
· Tue Nov 18 10:14:14 2014 +0000
937488b
Optimize Cortex-A57 cluster power down sequence on Juno
by Soby Mathew
· Mon Sep 22 14:13:34 2014 +0100
1604fa0
Optimize barrier usage during Cortex-A57 power down
by Soby Mathew
· Mon Sep 22 12:15:26 2014 +0100
c088433
Apply errata workarounds only when major/minor revisions match.
by Soby Mathew
· Mon Sep 22 12:11:36 2014 +0100
42aa5eb
Add support for level specific cache maintenance operations
by Soby Mathew
· Tue Sep 02 10:47:33 2014 +0100
802f865
Add support for selected Cortex-A57 errata workarounds
by Soby Mathew
· Thu Aug 14 16:19:29 2014 +0100
38b4bc9
Add CPU specific crash reporting handlers
by Soby Mathew
· Thu Aug 14 13:36:41 2014 +0100
8e2f287
Add CPU specific power management operations
by Soby Mathew
· Thu Aug 14 12:49:05 2014 +0100
f1785fd
Add platform API for reset handling
by Soby Mathew
· Thu Aug 14 12:22:32 2014 +0100
c704cbc
Introduce framework for CPU specific operations
by Soby Mathew
· Thu Aug 14 11:33:56 2014 +0100