Gitiles
Code Review Sign In
git01.mediatek.com / filogic / atf / 001f3cf22a1d84f5886c375fb7d7c7e05a7a9dc6
  1. 001f3cf Merge pull request #122 from 'danh-arm:dh/v0.4-docs' by Dan Handley · Tue Jun 03 18:50:13 2014 +0100
  2. dbdb7ff Merge pull request #124 from 'danh-arm:sm/imf-documentation' by Dan Handley · Tue Jun 03 18:48:27 2014 +0100
  3. b04412c Document design of the Interrupt Mangement Framework by Achin Gupta · Mon Jun 02 22:27:36 2014 +0100
  4. 8dc1219 Merge pull request #119 from 'soby-mathew:sm/doc_crash_reporting' by Dan Handley · Tue Jun 03 17:41:41 2014 +0100
  5. 593dea0 Merge pull request #117 from 'danh-arm:dh/v0.4-user-guide' by Dan Handley · Tue Jun 03 17:39:10 2014 +0100
  6. c677812 Merge pull request #121 'vikramkanigiri:vk/doc_for_133' by Dan Handley · Tue Jun 03 17:38:11 2014 +0100
  7. c45bf7a Documentation for BL3-1 hardening and reset vector by Vikram Kanigiri · Fri May 23 15:56:12 2014 +0100
  8. ff1c415 Trusted Firmware v0.4 release documentation by Dan Handley · Thu May 29 19:07:23 2014 +0100
  9. 3761028 User guide updates for v0.4 release by Dan Handley · Thu May 29 16:58:44 2014 +0100
  10. b3d30b7 Documentation for the new crash reporting implementation by Soby Mathew · Fri May 23 17:05:43 2014 +0100
  11. c7388d3 Merge pull request #116 from 'danh-arm:dh/refactoring-docs' by Dan Handley · Fri May 30 17:33:06 2014 +0100
  12. 0b314cc Fix porting guide references to platform.h by Dan Handley · Thu May 29 12:30:24 2014 +0100
  13. df87323 Merge pull request #111 'soby-mathew-sm:fix_cookie_to_int_handler' by Dan Handley · Thu May 29 17:11:04 2014 +0100
  14. b86acb0 Merge pull request #115 'athoelke-at:fix-bl31-X1-parameter' by Dan Handley · Thu May 29 17:09:24 2014 +0100
  15. b8b9002 Merge pull request #114 from 'vikramkanigiri:vk/pass_bl33_args' by Dan Handley · Thu May 29 17:05:34 2014 +0100
  16. 93c89ec Fix compilation issue for IMF_READ_INTERRUPT_ID build flag by Soby Mathew · Wed May 28 17:14:36 2014 +0100
  17. 799f0ab Pass 'cookie' parameter to interrupt handler in BL3-1 by Soby Mathew · Tue May 27 16:54:31 2014 +0100
  18. a55566d Allow platform parameter X1 to be passed to BL3-1 by Andrew Thoelke · Wed May 28 22:22:55 2014 +0100
  19. 614f395 Pass the args to the BL3-3 entrypoint by Vikram Kanigiri · Wed May 28 13:41:51 2014 +0100
  20. 459df4c Merge pull request #110 from soby-mathew:sm/support_normal_irq_in_tsp-v4 into for-v0.4 by Dan Handley · Tue May 27 18:46:22 2014 +0100
  21. 10e2df2 Merge pull request #112 from danh-arm:dh/refactor-plat-header-v4 into for-v0.4 by Dan Handley · Tue May 27 18:34:30 2014 +0100
  22. 701fea7 Further renames of platform porting functions by Dan Handley · Tue May 27 16:17:21 2014 +0100
  23. 2159ef4 Remove FVP specific comments in platform.h by Dan Handley · Tue May 27 15:39:41 2014 +0100
  24. 3d57851 Fixup Standard SMC Resume Handling by Soby Mathew · Tue May 27 10:20:01 2014 +0100
  25. b226a4d Add enable mmu platform porting interfaces by Dan Handley · Fri May 16 14:08:45 2014 +0100
  26. ea45157 Rename FVP specific files and functions by Dan Handley · Thu May 15 14:53:30 2014 +0100
  27. 7ce42df Move BL porting functions into platform.h by Dan Handley · Thu May 15 14:11:36 2014 +0100
  28. ed6ff95 Split platform.h into separate headers by Dan Handley · Wed May 14 17:44:19 2014 +0100
  29. 60b13e3 Remove unused data declarations by Dan Handley · Wed May 14 15:13:16 2014 +0100
  30. a17fefa Remove extern keyword from function declarations by Dan Handley · Wed May 14 12:38:32 2014 +0100
  31. 335bf58 Merge pull request #101 from sandrine-bailleux:sb/tf-issue-81-v2 by Andrew Thoelke · Fri May 23 12:14:37 2014 +0100
  32. 5e9b3ab doc: Update information about the memory layout by Sandrine Bailleux · Wed May 21 17:08:26 2014 +0100
  33. 6c8b359 Make the memory layout more flexible by Sandrine Bailleux · Thu May 22 15:28:26 2014 +0100
  34. f748806 Make BL1 RO and RW base addresses configurable by Sandrine Bailleux · Thu May 22 15:21:35 2014 +0100
  35. 332ff85 Merge pull request #104 from athoelke:at/tsp-entrypoints-v2 by Andrew Thoelke · Fri May 23 11:00:04 2014 +0100
  36. 077193f Merge pull request #105 from athoelke:sm/support_normal_irq_in_tsp-v2 by Andrew Thoelke · Fri May 23 11:00:04 2014 +0100
  37. 58484d4 Merge pull request #102 from achingupta:ag/tf-issues#104-v2 by Andrew Thoelke · Fri May 23 11:00:04 2014 +0100
  38. 31f0f8f Merge pull request #100 from jcastillo-arm:jc/tf-issues/149-v4 by Andrew Thoelke · Fri May 23 11:00:04 2014 +0100
  39. 44a07af Merge pull request #101 from sandrine-bailleux:sb/tf-issue-81-v2 by Andrew Thoelke · Fri May 23 11:00:04 2014 +0100
  40. a83a38c Merge pull request #103 from athoelke:dh/tf-issues#68-v3 by Andrew Thoelke · Fri May 23 11:00:04 2014 +0100
  41. 29c7ae1 Merge pull request #99 from vikramkanigiri:vk/tf-issues-133_V3 by Andrew Thoelke · Fri May 23 11:00:04 2014 +0100
  42. 1c5630d Merge pull request #67 from achingupta:ag/psci_standby_bug_fix by Andrew Thoelke · Fri May 23 11:00:04 2014 +0100
  43. aaa6ff8 Limit BL3-1 read/write access to SRAM by Andrew Thoelke · Thu May 22 13:44:47 2014 +0100
  44. 891c4ca Use a vector table for TSP entrypoints by Andrew Thoelke · Tue May 20 21:43:27 2014 +0100
  45. 9f71f70 Non-Secure Interrupt support during Standard SMC processing in TSP by Soby Mathew · Fri May 09 20:49:17 2014 +0100
  46. 21a30ab Allow BL3-2 platform definitions to be optional by Dan Handley · Tue Apr 15 11:38:38 2014 +0100
  47. bbc33f2 Enable secure timer to generate S-EL1 interrupts by Achin Gupta · Fri May 09 13:33:42 2014 +0100
  48. aeaab68 Add S-EL1 interrupt handling support in the TSPD by Achin Gupta · Fri May 09 13:21:31 2014 +0100
  49. a4f50c2 Add support for asynchronous FIQ handling in TSP by Achin Gupta · Fri May 09 12:17:56 2014 +0100
  50. 7671789 Add support for synchronous FIQ handling in TSP by Achin Gupta · Fri May 09 11:42:56 2014 +0100
  51. 405406d Use secure timer to generate S-EL1 interrupts by Achin Gupta · Fri May 09 12:00:17 2014 +0100
  52. 9cf2bb7 Introduce interrupt handling framework in BL3-1 by Achin Gupta · Fri May 09 11:07:09 2014 +0100
  53. 02d3628 Introduce platform api to access an ARM GIC by Achin Gupta · Sun May 04 19:02:52 2014 +0100
  54. 191e86e Introduce interrupt registration framework in BL3-1 by Achin Gupta · Fri May 09 10:03:15 2014 +0100
  55. 27b895e Add context library API to change a bit in SCR_EL3 by Achin Gupta · Sun May 04 18:38:28 2014 +0100
  56. 18d6eaf Rework 'state' field usage in per-cpu TSP context by Achin Gupta · Sun May 04 18:23:26 2014 +0100
  57. fcf9765 Doc: Add the "Building the Test Secure Payload" section by Sandrine Bailleux · Wed May 14 16:45:27 2014 +0100
  58. e701e30 fvp: Move TSP from Secure DRAM to Secure SRAM by Sandrine Bailleux · Tue May 20 17:28:25 2014 +0100
  59. 5ac3cc9 TSP: Let the platform decide which secure memory to use by Sandrine Bailleux · Tue May 20 17:22:24 2014 +0100
  60. 7055ca4 Reserve some DDR DRAM for secure use on FVP platforms by Juan Castillo · Fri May 16 15:33:15 2014 +0100
  61. 9637745 Add support for BL3-1 as a reset vector by Vikram Kanigiri · Thu Apr 24 11:02:16 2014 +0100
  62. d8c9d26 Rework memory information passing to BL3-x images by Vikram Kanigiri · Fri May 16 18:48:12 2014 +0100
  63. da56743 Populate BL31 input parameters as per new spec by Vikram Kanigiri · Tue Apr 15 18:08:08 2014 +0100
  64. a3a5e4a Rework handover interface between BL stages by Vikram Kanigiri · Thu May 15 18:27:15 2014 +0100
  65. 9851e42 Introduce macros to manipulate the SPSR by Vikram Kanigiri · Tue May 13 14:42:08 2014 +0100
  66. 8782852 Merge pull request #91 from linmaonly/lin_dev by Andrew Thoelke · Thu May 22 12:31:20 2014 +0100
  67. e2e9fb8 Merge pull request #83 from athoelke/at/tf-issues-126 by Andrew Thoelke · Thu May 22 12:30:37 2014 +0100
  68. ab3d352 Merge pull request #85 from hliebel/hl/bl30-doc by Andrew Thoelke · Thu May 22 12:28:05 2014 +0100
  69. 0b9d59f Address issue 156: 64-bit addresses get truncated by Lin Ma · Tue May 20 11:25:55 2014 -0700
  70. eed7a5b Improve BL3-0 documentation by Harry Liebel · Thu May 01 14:09:16 2014 +0100
  71. b058556 Merge pull request #78 from jeenuv:tf-issues-148 by Andrew Thoelke · Mon May 19 12:54:05 2014 +0100
  72. d1b6015 Add build configuration for timer save/restore by Jeenu Viswambharan · Mon May 12 15:28:47 2014 +0100
  73. 4b9608b Document summary of build options in user guide by Jeenu Viswambharan · Thu May 15 14:47:21 2014 +0100
  74. 19a0ace Reorganize build options by Jeenu Viswambharan · Thu May 15 14:40:58 2014 +0100
  75. e5c39fd Introduce convenience functions to build by Jeenu Viswambharan · Fri May 16 11:38:10 2014 +0100
  76. 2ecdd8f Set SCR_EL3.RW correctly before exiting bl31_main by Andrew Thoelke · Fri May 16 15:38:04 2014 +0100
  77. 5e5c207 Rework BL3-1 unhandled exception handling and reporting by Soby Mathew · Mon Apr 07 15:28:55 2014 +0100
  78. 96c207a Merge pull request #71 from sandrine-bailleux:sb/fix-tsp-fvp-makefile by Andrew Thoelke · Fri May 16 12:27:33 2014 +0100
  79. 6bee0fc Merge pull request #69 from sandrine-bailleux:sb/split-mmu-fcts-per-el by Andrew Thoelke · Fri May 16 12:26:26 2014 +0100
  80. a3bd38c Merge pull request #68 from jcastillo-arm/jc/tf-issues/137 by Andrew Thoelke · Fri May 16 12:02:12 2014 +0100
  81. 55452f1 Merge pull request #66 from athoelke/tzc-config-fix by danh-arm · Fri May 16 09:12:25 2014 +0100
  82. 3086cc9 fvp: Use the right implem. of plat_report_exception() in BL3-2 by Sandrine Bailleux · Tue May 13 16:41:25 2014 +0100
  83. 969bdb2 Fix C accessors to GIC distributor registers with set/clear semantics by Juan Castillo · Mon Apr 28 12:48:40 2014 +0100
  84. 42c5280 Fix broken standby state implementation in PSCI by Achin Gupta · Fri May 09 19:32:25 2014 +0100
  85. fe3374b Fixes for TZC configuration on FVP by Andrew Thoelke · Fri May 09 15:36:13 2014 +0100
  86. 74a62b3 fvp: Provide per-EL MMU setup functions by Sandrine Bailleux · Fri May 09 11:35:36 2014 +0100
  87. 25232af Introduce IS_IN_ELX() macros by Sandrine Bailleux · Fri May 09 11:23:11 2014 +0100
  88. df89f9f Merge pull request #65 from vikramkanigiri/vk/console_init by danh-arm · Thu May 08 12:27:15 2014 +0100
  89. 9ceff0f Merge pull request #63 from soby-mathew/sm/save_callee_saved_registers_in_cpu_context-1 by danh-arm · Thu May 08 12:25:02 2014 +0100
  90. 3684abf Ensure a console is initialized before it is used by Vikram Kanigiri · Thu Mar 27 14:33:15 2014 +0000
  91. 1644425 Merge pull request #62 from athoelke/set-little-endian-v2 by danh-arm · Thu May 08 12:01:24 2014 +0100
  92. 6c5192a Preserve x19-x29 across world switch for exception handling by Soby Mathew · Wed Apr 30 15:36:37 2014 +0100
  93. 6bdfa91 Merge pull request #58 from athoelke/optimise-cache-flush-v2 by danh-arm · Thu May 08 12:01:10 2014 +0100
  94. 86f0665 Merge pull request #61 from athoelke/use-mrs-msr-from-assembler-v2 by danh-arm · Thu May 08 12:00:10 2014 +0100
  95. 99cb464 Merge pull request #60 from athoelke/disable-mmu-v2 by danh-arm · Thu May 08 11:55:19 2014 +0100
  96. 719e870 Merge pull request #59 from athoelke/review-barriers-v2 by danh-arm · Thu May 08 11:55:13 2014 +0100
  97. faed43f Merge pull request #57 from sandrine-bailleux/sb/remove-pl011-base by danh-arm · Thu May 08 10:13:01 2014 +0100
  98. aa3266a Remove unused 'PL011_BASE' macro by Sandrine Bailleux · Tue May 06 13:25:37 2014 +0100
  99. 6a5b3a4 Optimise data cache clean/invalidate operation by Andrew Thoelke · Fri Apr 25 10:49:30 2014 +0100
  100. 5879ffd Remove unused or invalid asm helper functions by Andrew Thoelke · Mon Apr 28 12:33:52 2014 +0100