| Jorge Ramirez-Ortiz | bf084dc | 2018-09-23 09:36:13 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2015-2017, Renesas Electronics Corporation. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #ifndef LIFEC_REGISTER_H__ |
| 8 | #define LIFEC_REGISTER_H__ |
| 9 | |
| 10 | #define LIFEC_SEC_BASE (0xE6110000U) |
| 11 | |
| 12 | #define SEC_SRC (LIFEC_SEC_BASE + 0x0008U) |
| 13 | #define SEC_SEL0 (LIFEC_SEC_BASE + 0x0030U) |
| 14 | #define SEC_SEL1 (LIFEC_SEC_BASE + 0x0034U) |
| 15 | #define SEC_SEL2 (LIFEC_SEC_BASE + 0x0038U) |
| 16 | #define SEC_SEL3 (LIFEC_SEC_BASE + 0x003CU) |
| 17 | #define SEC_SEL4 (LIFEC_SEC_BASE + 0x0058U) |
| 18 | #define SEC_SEL5 (LIFEC_SEC_BASE + 0x005CU) |
| 19 | #define SEC_SEL6 (LIFEC_SEC_BASE + 0x0060U) |
| 20 | #define SEC_SEL7 (LIFEC_SEC_BASE + 0x0064U) |
| 21 | #define SEC_SEL8 (LIFEC_SEC_BASE + 0x0068U) |
| 22 | #define SEC_SEL9 (LIFEC_SEC_BASE + 0x006CU) |
| 23 | #define SEC_SEL10 (LIFEC_SEC_BASE + 0x0070U) |
| 24 | #define SEC_SEL11 (LIFEC_SEC_BASE + 0x0074U) |
| 25 | #define SEC_SEL12 (LIFEC_SEC_BASE + 0x0078U) |
| 26 | #define SEC_SEL13 (LIFEC_SEC_BASE + 0x007CU) |
| 27 | #define SEC_SEL14 (LIFEC_SEC_BASE + 0x0080U) |
| 28 | #define SEC_SEL15 (LIFEC_SEC_BASE + 0x0084U) |
| 29 | #define SEC_GRP0CR0 (LIFEC_SEC_BASE + 0x0138U) |
| 30 | #define SEC_GRP1CR0 (LIFEC_SEC_BASE + 0x013CU) |
| 31 | #define SEC_GRP0CR1 (LIFEC_SEC_BASE + 0x0140U) |
| 32 | #define SEC_GRP1CR1 (LIFEC_SEC_BASE + 0x0144U) |
| 33 | #define SEC_GRP0CR2 (LIFEC_SEC_BASE + 0x0148U) |
| 34 | #define SEC_GRP1CR2 (LIFEC_SEC_BASE + 0x014CU) |
| 35 | #define SEC_GRP0CR3 (LIFEC_SEC_BASE + 0x0150U) |
| 36 | #define SEC_GRP1CR3 (LIFEC_SEC_BASE + 0x0154U) |
| 37 | #define SEC_GRP0COND0 (LIFEC_SEC_BASE + 0x0158U) |
| 38 | #define SEC_GRP1COND0 (LIFEC_SEC_BASE + 0x015CU) |
| 39 | #define SEC_GRP0COND1 (LIFEC_SEC_BASE + 0x0160U) |
| 40 | #define SEC_GRP1COND1 (LIFEC_SEC_BASE + 0x0164U) |
| 41 | #define SEC_GRP0COND2 (LIFEC_SEC_BASE + 0x0168U) |
| 42 | #define SEC_GRP1COND2 (LIFEC_SEC_BASE + 0x016CU) |
| 43 | #define SEC_GRP0COND3 (LIFEC_SEC_BASE + 0x0170U) |
| 44 | #define SEC_GRP1COND3 (LIFEC_SEC_BASE + 0x0174U) |
| 45 | #define SEC_GRP0COND4 (LIFEC_SEC_BASE + 0x0178U) |
| 46 | #define SEC_GRP1COND4 (LIFEC_SEC_BASE + 0x017CU) |
| 47 | #define SEC_GRP0COND5 (LIFEC_SEC_BASE + 0x0180U) |
| 48 | #define SEC_GRP1COND5 (LIFEC_SEC_BASE + 0x0184U) |
| 49 | #define SEC_GRP0COND6 (LIFEC_SEC_BASE + 0x0188U) |
| 50 | #define SEC_GRP1COND6 (LIFEC_SEC_BASE + 0x018CU) |
| 51 | #define SEC_GRP0COND7 (LIFEC_SEC_BASE + 0x0190U) |
| 52 | #define SEC_GRP1COND7 (LIFEC_SEC_BASE + 0x0194U) |
| 53 | #define SEC_GRP0COND8 (LIFEC_SEC_BASE + 0x0198U) |
| 54 | #define SEC_GRP1COND8 (LIFEC_SEC_BASE + 0x019CU) |
| 55 | #define SEC_GRP0COND9 (LIFEC_SEC_BASE + 0x01A0U) |
| 56 | #define SEC_GRP1COND9 (LIFEC_SEC_BASE + 0x01A4U) |
| 57 | #define SEC_GRP0COND10 (LIFEC_SEC_BASE + 0x01A8U) |
| 58 | #define SEC_GRP1COND10 (LIFEC_SEC_BASE + 0x01ACU) |
| 59 | #define SEC_GRP0COND11 (LIFEC_SEC_BASE + 0x01B0U) |
| 60 | #define SEC_GRP1COND11 (LIFEC_SEC_BASE + 0x01B4U) |
| 61 | #define SEC_GRP0COND12 (LIFEC_SEC_BASE + 0x01B8U) |
| 62 | #define SEC_GRP1COND12 (LIFEC_SEC_BASE + 0x01BCU) |
| 63 | #define SEC_GRP0COND13 (LIFEC_SEC_BASE + 0x01C0U) |
| 64 | #define SEC_GRP1COND13 (LIFEC_SEC_BASE + 0x01C4U) |
| 65 | #define SEC_GRP0COND14 (LIFEC_SEC_BASE + 0x01C8U) |
| 66 | #define SEC_GRP1COND14 (LIFEC_SEC_BASE + 0x01CCU) |
| 67 | #define SEC_GRP0COND15 (LIFEC_SEC_BASE + 0x01D0U) |
| 68 | #define SEC_GRP1COND15 (LIFEC_SEC_BASE + 0x01D4U) |
| 69 | #define SEC_READONLY0 (LIFEC_SEC_BASE + 0x01D8U) |
| 70 | #define SEC_READONLY1 (LIFEC_SEC_BASE + 0x01DCU) |
| 71 | #define SEC_READONLY2 (LIFEC_SEC_BASE + 0x01E0U) |
| 72 | #define SEC_READONLY3 (LIFEC_SEC_BASE + 0x01E4U) |
| 73 | #define SEC_READONLY4 (LIFEC_SEC_BASE + 0x01E8U) |
| 74 | #define SEC_READONLY5 (LIFEC_SEC_BASE + 0x01ECU) |
| 75 | #define SEC_READONLY6 (LIFEC_SEC_BASE + 0x01F0U) |
| 76 | #define SEC_READONLY7 (LIFEC_SEC_BASE + 0x01F4U) |
| 77 | #define SEC_READONLY8 (LIFEC_SEC_BASE + 0x01F8U) |
| 78 | #define SEC_READONLY9 (LIFEC_SEC_BASE + 0x01FCU) |
| 79 | #define SEC_READONLY10 (LIFEC_SEC_BASE + 0x0200U) |
| 80 | #define SEC_READONLY11 (LIFEC_SEC_BASE + 0x0204U) |
| 81 | #define SEC_READONLY12 (LIFEC_SEC_BASE + 0x0208U) |
| 82 | #define SEC_READONLY13 (LIFEC_SEC_BASE + 0x020CU) |
| 83 | #define SEC_READONLY14 (LIFEC_SEC_BASE + 0x0210U) |
| 84 | #define SEC_READONLY15 (LIFEC_SEC_BASE + 0x0214U) |
| 85 | |
| 86 | #define LIFEC_SAFE_BASE (0xE6120000U) |
| 87 | #define SAFE_GRP0CR0 (LIFEC_SAFE_BASE + 0x0138U) |
| 88 | #define SAFE_GRP1CR0 (LIFEC_SAFE_BASE + 0x013CU) |
| 89 | #define SAFE_GRP0CR1 (LIFEC_SAFE_BASE + 0x0140U) |
| 90 | #define SAFE_GRP1CR1 (LIFEC_SAFE_BASE + 0x0144U) |
| 91 | #define SAFE_GRP0CR2 (LIFEC_SAFE_BASE + 0x0148U) |
| 92 | #define SAFE_GRP1CR2 (LIFEC_SAFE_BASE + 0x014CU) |
| 93 | #define SAFE_GRP0CR3 (LIFEC_SAFE_BASE + 0x0150U) |
| 94 | #define SAFE_GRP1CR3 (LIFEC_SAFE_BASE + 0x0154U) |
| 95 | #define SAFE_GRP0COND0 (LIFEC_SAFE_BASE + 0x0158U) |
| 96 | #define SAFE_GRP1COND0 (LIFEC_SAFE_BASE + 0x015CU) |
| 97 | #define SAFE_GRP0COND1 (LIFEC_SAFE_BASE + 0x0160U) |
| 98 | #define SAFE_GRP1COND1 (LIFEC_SAFE_BASE + 0x0164U) |
| 99 | #define SAFE_GRP0COND2 (LIFEC_SAFE_BASE + 0x0168U) |
| 100 | #define SAFE_GRP1COND2 (LIFEC_SAFE_BASE + 0x016CU) |
| 101 | #define SAFE_GRP0COND3 (LIFEC_SAFE_BASE + 0x0170U) |
| 102 | #define SAFE_GRP1COND3 (LIFEC_SAFE_BASE + 0x0174U) |
| 103 | #define SAFE_GRP0COND4 (LIFEC_SAFE_BASE + 0x0178U) |
| 104 | #define SAFE_GRP1COND4 (LIFEC_SAFE_BASE + 0x017CU) |
| 105 | #define SAFE_GRP0COND5 (LIFEC_SAFE_BASE + 0x0180U) |
| 106 | #define SAFE_GRP1COND5 (LIFEC_SAFE_BASE + 0x0184U) |
| 107 | #define SAFE_GRP0COND6 (LIFEC_SAFE_BASE + 0x0188U) |
| 108 | #define SAFE_GRP1COND6 (LIFEC_SAFE_BASE + 0x018CU) |
| 109 | #define SAFE_GRP0COND7 (LIFEC_SAFE_BASE + 0x0190U) |
| 110 | #define SAFE_GRP1COND7 (LIFEC_SAFE_BASE + 0x0194U) |
| 111 | #define SAFE_GRP0COND8 (LIFEC_SAFE_BASE + 0x0198U) |
| 112 | #define SAFE_GRP1COND8 (LIFEC_SAFE_BASE + 0x019CU) |
| 113 | #define SAFE_GRP0COND9 (LIFEC_SAFE_BASE + 0x01A0U) |
| 114 | #define SAFE_GRP1COND9 (LIFEC_SAFE_BASE + 0x01A4U) |
| 115 | #define SAFE_GRP0COND10 (LIFEC_SAFE_BASE + 0x01A8U) |
| 116 | #define SAFE_GRP1COND10 (LIFEC_SAFE_BASE + 0x01ACU) |
| 117 | #define SAFE_GRP0COND11 (LIFEC_SAFE_BASE + 0x01B0U) |
| 118 | #define SAFE_GRP1COND11 (LIFEC_SAFE_BASE + 0x01B4U) |
| 119 | #define SAFE_GRP0COND12 (LIFEC_SAFE_BASE + 0x01B8U) |
| 120 | #define SAFE_GRP1COND12 (LIFEC_SAFE_BASE + 0x01BCU) |
| 121 | #define SAFE_GRP0COND13 (LIFEC_SAFE_BASE + 0x01C0U) |
| 122 | #define SAFE_GRP1COND13 (LIFEC_SAFE_BASE + 0x01C4U) |
| 123 | #define SAFE_GRP0COND14 (LIFEC_SAFE_BASE + 0x01C8U) |
| 124 | #define SAFE_GRP1COND14 (LIFEC_SAFE_BASE + 0x01CCU) |
| 125 | #define SAFE_GRP0COND15 (LIFEC_SAFE_BASE + 0x01D0U) |
| 126 | #define SAFE_GRP1COND15 (LIFEC_SAFE_BASE + 0x01D4U) |
| 127 | #define SAFE_READONLY0 (LIFEC_SAFE_BASE + 0x01D8U) |
| 128 | #define SAFE_READONLY1 (LIFEC_SAFE_BASE + 0x01DCU) |
| 129 | #define SAFE_READONLY2 (LIFEC_SAFE_BASE + 0x01E0U) |
| 130 | #define SAFE_READONLY3 (LIFEC_SAFE_BASE + 0x01E4U) |
| 131 | #define SAFE_READONLY4 (LIFEC_SAFE_BASE + 0x01E8U) |
| 132 | #define SAFE_READONLY5 (LIFEC_SAFE_BASE + 0x01ECU) |
| 133 | #define SAFE_READONLY6 (LIFEC_SAFE_BASE + 0x01F0U) |
| 134 | #define SAFE_READONLY7 (LIFEC_SAFE_BASE + 0x01F4U) |
| 135 | #define SAFE_READONLY8 (LIFEC_SAFE_BASE + 0x01F8U) |
| 136 | #define SAFE_READONLY9 (LIFEC_SAFE_BASE + 0x01FCU) |
| 137 | #define SAFE_READONLY10 (LIFEC_SAFE_BASE + 0x0200U) |
| 138 | #define SAFE_READONLY11 (LIFEC_SAFE_BASE + 0x0204U) |
| 139 | #define SAFE_READONLY12 (LIFEC_SAFE_BASE + 0x0208U) |
| 140 | #define SAFE_READONLY13 (LIFEC_SAFE_BASE + 0x020CU) |
| 141 | #define SAFE_READONLY14 (LIFEC_SAFE_BASE + 0x0210U) |
| 142 | #define SAFE_READONLY15 (LIFEC_SAFE_BASE + 0x0214U) |
| 143 | |
| 144 | #endif |