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git01.mediatek.com / filogic / atf / ff263dc1228d7b645aad5d15b676d105aff1bce4 / . / .cz.json
blob: 5447f1704f7a9a2112a4122f5305558c0cd85d0c [file] [log] [blame]
Chris Kay1c8a4962020-12-09 14:35:46 +0000[diff] [blame]1{
2 "path": "./node_modules/cz-conventional-changelog",
3 "maxHeaderWidth": 50,
Chris Kay025c87f2021-11-09 20:05:38 +0000[diff] [blame]4 "maxLineWidth": 72,
5 "types": [
6 {
7 "type": "feat",
8 "title": "New Features",
9 "description": "A new feature"
10 },
11 {
12 "type": "fix",
13 "title": "Resolved Issues",
14 "description": "A bug fix"
15 },
16 {
17 "type": "build",
18 "title": "Build System",
19 "description": "Changes that affect the build system or external dependencies",
20 "hidden": true
21 },
22 {
23 "type": "ci",
24 "title": "Continuous Integration",
25 "description": "Changes to our CI configuration files and scripts",
26 "hidden": true
27 },
28 {
29 "type": "docs",
30 "title": "Build System",
31 "description": "Documentation-only changes",
32 "hidden": true
33 },
34 {
35 "type": "perf",
36 "title": "Performance Improvements",
37 "description": "A code change that improves performance",
38 "hidden": true
39 },
40 {
41 "type": "refactor",
42 "title": "Code Refactoring",
43 "description": "A code change that neither fixes a bug nor adds a feature",
44 "hidden": true
45 },
46 {
47 "type": "revert",
48 "title": "Reverted Changes",
49 "description": "Changes that revert a previous change",
50 "hidden": true
51 },
52 {
53 "type": "style",
54 "title": "Style",
55 "description": "Changes that do not affect the meaning of the code (white-space, formatting, missing semi-colons, etc.)",
56 "hidden": true
57 },
58 {
59 "type": "test",
60 "title": "Tests",
61 "description": "Adding missing tests or correcting existing tests",
62 "hidden": true
63 },
64 {
65 "type": "chore",
66 "title": "Miscellaneous",
67 "description": "Any other change",
68 "hidden": true
69 }
70 ],
Chris Kay4a413dc2021-11-12 15:34:13 +0000[diff] [blame]71 "sections": [
72 {
73 "title": "Architecture",
74 "sections": [
75 {
76 "title": "Activity Monitors Extension (FEAT_AMU)",
77 "scopes": ["amu"]
78 },
79 {
80 "title": "Support for the `HCRX_EL2` register (FEAT_HCX)",
81 "scopes": ["hcx"]
82 },
83 {
84 "title": "Memory Partitioning and Monitoring (MPAM) Extension (FEAT_MPAM)",
85 "scopes": ["mpam"]
86 },
87 {
88 "title": "Scalable Matrix Extension (FEAT_SME)",
89 "scopes": ["sme"]
90 },
91 {
92 "title": "Scalable Vector Extension (FEAT_SVE)",
93 "scopes": ["sve"]
94 },
95 {
96 "title": "Trace Buffer Extension (FEAT_TRBE)",
97 "scopes": ["trbe"]
98 },
99 {
100 "title": "Self-hosted Trace Extensions (FEAT_TRF)",
101 "scopes": ["trf", "sys_reg_trace"]
102 }
103 ]
104 },
105 {
106 "title": "Platforms",
107 "sections": [
108 {
109 "title": "Allwinner",
110 "scopes": ["allwinner", "plat/allwinner"]
111 },
112 {
113 "title": "Arm",
114 "scopes": ["arm", "plat/arm"],
115 "sections": [
116 {
117 "title": "FPGA",
118 "scopes": ["fpga", "arm_fgpa", "arm_fpga", "plat/arm_fpga"]
119 },
120 {
121 "title": "FVP",
122 "scopes": ["fvp", "plat/fvp"]
123 },
124 {
125 "title": "FVP-R",
126 "scopes": ["fvp-r", "fvp_r"]
127 },
128 {
129 "title": "Juno",
130 "scopes": ["juno"]
131 },
132 {
133 "title": "Morello",
134 "scopes": ["morello"]
135 },
136 {
137 "title": "RD",
138 "scopes": ["rd"],
139 "sections": [
140 {
141 "title": "RD-N2",
142 "scopes": ["rdn2", "board/rdn2"]
143 }
144 ]
145 },
146 {
147 "title": "SGI",
148 "scopes": ["sgi", "plat/sgi", "plat/arm/sgi" ]
149 },
150 {
151 "title": "TC",
152 "scopes": ["tc"],
153 "sections": [
154 {
155 "title": "TC0",
156 "scopes": ["tc0", "plat/tc0"]
157 }
158 ]
159 }
160 ]
161 },
162 {
163 "title": "Marvell",
164 "scopes": ["marvell", "plat/marvell"],
165 "sections": [
166 {
167 "title": "Armada",
168 "scopes": ["armada", "plat/marvell/armada"],
169 "sections": [
170 {
171 "title": "A3K",
172 "scopes": ["a3k", "plat/marvell/a3k"]
173 },
174 {
175 "title": "A8K",
176 "scopes": ["a8k", "plat/marvell/a8k"]
177 }
178 ]
179 }
180 ]
181 },
182 {
183 "title": "MediaTek",
184 "scopes": ["mediatek", "plat/mediatek/common", "plat/mediatek"],
185 "sections": [
186 {
187 "title": "MT8183",
188 "scopes": ["mt8183", "plat/mediatek/mt8183"]
189 },
190 {
191 "title": "MT8192",
192 "scopes": ["mt8192", "plat/mdeiatek/mt8192"]
193 },
194 {
195 "title": "MT8195",
196 "scopes": ["mt8195", "plat/mediatek/me8195", "plat/mediatek/mt8195", "plat/mdeiatek/mt8195"]
197 }
198 ]
199 },
200 {
201 "title": "NVIDIA",
202 "scopes": ["nvidia"],
203 "sections": [
204 {
205 "title": "Tegra",
206 "scopes": ["tegra", "plat/tegra"],
207 "sections": [
208 {
209 "title": "Tegra 132",
210 "scopes": ["tegra132"]
211 }
212 ]
213 }
214 ]
215 },
216 {
217 "title": "NXP",
218 "scopes": ["nxp", "plat/nxp", "plat/nxp/common"],
219 "sections": [
220 {
221 "title": "i.MX",
222 "scopes": ["imx", "plat/imx", "plat/imx/imx"],
223 "sections": [
224 {
225 "title": "i.MX 8M",
226 "scopes": ["imx8m", "plat/imx8m", "plat/imx/imx8m"],
227 "sections": [
228 {
229 "title": "i.MX 8M Mini",
230 "scopes": ["imx8mm", "plat/imx/imx8m/imx8mm"]
231 },
232 {
233 "title": "i.MX 8M Plus",
234 "scopes": ["imx8mp", "plat/imx/imx8m/imx8mp"]
235 }
236 ]
237 }
238 ]
239 },
240 {
241 "title": "Layerscape",
242 "scopes": ["layerscape", "docs/nxp/layerscape"],
243 "sections": [
244 {
245 "title": "LX2",
246 "scopes": ["lx2", "plat/nxp/lx2"],
247 "sections": [
248 {
249 "title": "LX216",
250 "scopes": ["lx216", "plat/nxp/lx216x"],
251 "sections": [
252 {
253 "title": "LX2160",
254 "scopes": ["lx2160", "plat/soc-lx2160"]
255 }
256 ]
257 },
258 {
259 "title": "LS1028A",
260 "scopes": ["ls1028a", "plat/nxp/ls1028a"],
261 "sections": [
262 {
263 "title": "LS1028ARDB",
264 "scopes": ["ls1028ardb", "plat/nxp/ls1028ardb"]
265 }
266 ]
267 }
268 ]
269 }
270 ]
271 }
272 ]
273 },
274 {
275 "title": "QEMU",
276 "scopes": ["qemu", "plat/qemu"]
277 },
278 {
279 "title": "QTI",
280 "scopes": ["qti"],
281 "sections": [
282 {
283 "title": "SC1780",
284 "scopes": ["sc7180", "plat/qti/sc7180"]
285 },
286 {
287 "title": "SC7280",
288 "scopes": ["sc7280", "plat/qti/sc7280"]
289 }
290 ]
291 },
292 {
293 "title": "Raspberry Pi",
294 "scopes": ["rpi"],
295 "sections": [
296 {
297 "title": "Raspberry Pi 4",
298 "scopes": ["rpi4"]
299 }
300 ]
301 },
302 {
303 "title": "Renesas",
304 "scopes": ["renesas"],
305 "sections": [
306 {
307 "title": "R-Car",
308 "scopes": ["rcar", "plat/rcar"],
309 "sections": [
310 {
311 "title": "R-Car 3",
312 "scopes": ["rcar3", "plat/rcar3"]
313 }
314 ]
315 }
316 ]
317 },
318 {
319 "title": "Rockchip",
320 "scopes": ["rockchip"],
321 "sections": [
322 {
323 "title": "RK3399",
324 "scopes": ["rk3399", "rockchip/rk3399", "rk3399/suspend"]
325 }
326 ]
327 },
328 {
329 "title": "Socionext",
330 "scopes": ["socionext"],
331 "sections": [
332 {
333 "title": "Synquacer",
334 "scopes": ["synquacer", "plat/synquacer"]
335 }
336 ]
337 },
338 {
339 "title": "ST",
340 "scopes": ["st", "plat/st"],
341 "sections": [
342 {
343 "title": "ST32MP1",
344 "scopes": ["stm32mp1", "plat/st/stm32mp1"]
345 }
346 ]
347 },
348 {
349 "title": "Xilinx",
350 "scopes": ["xilinx", "plat/xilinx"],
351 "sections": [
352 {
353 "title": "Versal",
354 "scopes": ["versal", "plat/xilinx/versal/include", "plat/xilinx/versal", "plat/versal"]
355 },
356 {
357 "title": "ZynqMP",
358 "scopes": ["zynqmp", "plat/zynqmp", "plat/xilinx/zynqmp"]
359 }
360 ]
361 }
362 ]
363 },
364 {
365 "title": "Bootloader Images",
366 "scopes": ["bl", "bl_common"],
367 "sections": [
368 {
369 "title": "BL1",
370 "scopes": ["bl1"]
371 },
372 {
373 "title": "BL2",
374 "scopes": ["bl2"]
375 }
376 ]
377 },
378 {
379 "title": "Services",
380 "scopes": ["services"],
381 "sections": [
382 {
383 "title": "FF-A",
384 "scopes": ["ffa", "ff-a"]
385 },
386 {
387 "title": "RME",
388 "scopes": ["rme"]
389 },
390 {
391 "title": "SPM",
392 "scopes": ["spm", "spmc", "spmd", "SPMD", "spm_mm"]
393 }
394 ]
395 },
396 {
397 "title": "Libraries",
398 "sections": [
399 {
400 "title": "CPU Support",
401 "scopes": ["cpus", "cpu", "errata", "errata_report"]
402 },
403 {
404 "title": "EL3 Runtime",
405 "scopes": ["el3-runtime", "el3_runtime"]
406 },
407 {
408 "title": "FCONF",
409 "scopes": ["fconf"]
410 },
411 {
412 "title": "MPMM",
413 "scopes": ["mpmm"]
414 },
415 {
416 "title": "OP-TEE",
417 "scopes": ["optee", "lib/optee"]
418 },
419 {
420 "title": "PSCI",
421 "scopes": ["psci"]
422 },
423 {
424 "title": "GPT",
425 "scopes": ["gpt", "gpt_rme"]
426 },
427 {
428 "title": "SMCCC",
429 "scopes": ["smccc"]
430 },
431 {
432 "title": "Translation Tables",
433 "scopes": ["xlat"]
434 }
435 ]
436 },
437 {
438 "title": "Drivers",
439 "sections": [
440 {
441 "title": "Authentication",
442 "scopes": ["auth", "driver/auth"],
443 "sections": [
444 {
445 "title": "CryptoCell-713",
446 "scopes": ["cc-713"]
447 }
448 ]
449 },
450 {
451 "title": "FWU",
452 "scopes": ["fwu", "fwu_metadata"]
453 },
454 {
455 "title": "I/O",
456 "scopes": ["io"],
457 "sections": [
458 {
459 "title": "MTD",
460 "scopes": ["mtd", "io_mtd"]
461 }
462 ]
463 },
464 {
465 "title": "Measured Boot",
466 "scopes": ["measured-boot", "measured boot", "measured_boot"]
467 },
468 {
469 "title": "MMC",
470 "scopes": ["mmc", "drivers/mmc"]
471 },
472 {
473 "title": "MTD",
474 "scopes": ["mtd", "drivers/mtd"],
475 "sections": [
476 {
477 "title": "NAND",
478 "scopes": ["nand"],
479 "sections": [
480 {
481 "title": "SPI NAND",
482 "scopes": ["spi-nand", "spi_nand"]
483 }
484 ]
485 }
486 ]
487 },
488 {
489 "title": "SCMI",
490 "scopes": ["scmi", "scmi_common", "drivers/scmi-msg"]
491 },
492 {
493 "title": "UFS",
494 "scopes": ["ufs"]
495 },
496 {
497 "title": "Arm",
498 "scopes": ["arm-drivers"],
499 "sections": [
500 {
501 "title": "Ethos-N",
502 "scopes": ["ethos-n", "drivers/arm/ethosn"]
503 },
504 {
505 "title": "GIC",
506 "scopes": ["gic"],
507 "sections": [
508 {
509 "title": "GICv3",
510 "scopes": ["gicv3"],
511 "sections": [
512 {
513 "title": "GIC-600AE",
514 "scopes": ["gic600ae"]
515 }
516 ]
517 }
518 ]
519 },
520 {
521 "title": "TZC",
522 "scopes": ["tzc"],
523 "sections": [
524 {
525 "title": "TZC-400",
526 "scopes": ["tzc400", "drivers/tzc400"]
527 }
528 ]
529 }
530 ]
531 },
532 {
533 "title": "Marvell",
534 "scopes": ["marvell-drivers"],
535 "sections": [
536 {
537 "title": "COMPHY",
538 "scopes": ["marvell-comphy", "drivers/marvell/comphy"],
539 "sections": [
540 {
541 "title": "Armada 3700",
542 "scopes": ["marvell-comphy-3700", "drivers/marvell/comphy-3700"]
543 },
544 {
545 "title": "CP110",
546 "scopes": ["marvell-comphy-cp110", "drivers/marvell/comphy-cp110"]
547 }
548 ]
549 },
550 {
551 "title": "UART",
552 "scopes": ["marvell-uart", "plat/marvell/uart"]
553 },
554 {
555 "title": "Armada",
556 "scopes": ["armada-drivers"],
557 "sections": [
558 {
559 "title": "A3K",
560 "scopes": ["a3k-drivers"],
561 "sections": [
562 {
563 "title": "A3720",
564 "scopes": ["a3720-uart", "plat/marvell/a3720/uart"]
565 }
566 ]
567 }
568 ]
569 }
570 ]
571 },
572 {
573 "title": "MediaTek",
574 "scopes": ["mediatek-drivers"],
575 "sections": [
576 {
577 "title": "APU",
578 "scopes": ["mediatek-apu", "plat/mediatek/apu"]
579 },
580 {
581 "title": "EMI MPU",
582 "scopes": ["mediatek-emi-mpu", "plat/mediatek/mpu"]
583 },
584 {
585 "title": "PMIC Wrapper",
586 "scopes": ["mediatek-pmic-wrapper", "plat/mediatek/pmic_wrap"]
587 },
588 {
589 "title": "MT8192",
590 "scopes": ["mt8192-drivers"],
591 "sections": [
592 {
593 "title": "SPM",
594 "scopes": ["mt8192-spm", "mediatek/mt8192/spm"]
595 }
596 ]
597 }
598 ]
599 },
600 {
601 "title": "NXP",
602 "scopes": ["nxp-drivers"],
603 "sections": [
604 {
605 "title": "DCFG",
606 "scopes": ["nxp-dcfg", "driver/nxp/dcfg"]
607 },
608 {
609 "title": "FLEXSPI",
610 "scopes": ["flexspi", "include/drivers/flexspi", "driver/nxp/xspi"]
611 },
612 {
613 "title": "SCFG",
614 "scopes": ["nxp-scfg", "nxp/scfg"]
615 },
616 {
617 "title": "SFP",
618 "scopes": ["nxp-sfp", "drivers/nxp/sfp"]
619 }
620 ]
621 },
622 {
623 "title": "Renesas",
624 "scopes": ["renesas-drivers"],
625 "sections": [
626 {
627 "title": "R-Car3",
628 "scopes": ["rcar3-drivers", "drivers/rcar3"]
629 }
630 ]
631 },
632 {
633 "title": "ST",
634 "scopes": ["st-drivers", "drivers/st"],
635 "sections": [
636 {
637 "title": "Clock",
638 "scopes": ["st-clock", "stm32mp_clk", "drivers/st/clk", "stm32mp1_clk"]
639 },
640 {
641 "title": "I/O",
642 "scopes": ["st-io-drivers"],
643 "sections": [
644 {
645 "title": "STM32 Image",
646 "scopes": ["st-io-stm32image", "io-stm32image", "io_stm32image"]
647 }
648 ]
649 },
650 {
651 "title": "SDMMC2",
652 "scopes": ["st-sdmmc2", "stm32_sdmmc2"]
653 },
654 {
655 "title": "ST PMIC",
656 "scopes": ["st-pmic", "drivers/st/pmic"]
657 },
658 {
659 "title": "STPMIC1",
660 "scopes": ["stpmic1"]
661 },
662 {
663 "title": "UART",
664 "scopes": ["st-uart"],
665 "sections": [
666 {
667 "title": "STM32 Console",
668 "scopes": ["stm32-console", "stm32_console"]
669 }
670 ]
671 },
672 {
673 "title": "USB",
674 "scopes": ["st-usb", "drivers/st/usb"]
675 }
676 ]
677 },
678 {
679 "title": "USB",
680 "scopes": ["usb", "drivers/usb"]
681 }
682 ]
683 },
684 {
685 "title": "Miscellaneous",
686 "sections": [
687 {
688 "title": "AArch64",
689 "scopes": ["aarch64"]
690 },
691 {
692 "title": "Debug",
693 "scopes": ["debug", "common/debug"]
694 },
695 {
696 "title": "CRC32",
697 "scopes": ["crc32"],
698 "sections": [
699 {
700 "title": "Hardware CRC32",
701 "scopes": ["hw-crc32", "hw_crc", "hw_crc32"]
702 },
703 {
704 "title": "Software CRC32",
705 "scopes": ["sw-crc32", "sw_crc32"]
706 }
707 ]
708 },
709 {
710 "title": "DT Bindings",
711 "scopes": ["dt-bindings"]
712 },
713 {
714 "title": "FDT Wrappers",
715 "scopes": ["fdt-wrappers"]
716 },
717 {
718 "title": "FDTs",
719 "scopes": ["fdts", "fdt"],
720 "sections": [
721 {
722 "title": "Morello",
723 "scopes": ["morello-fdts", "fdts/morello"]
724 },
725 {
726 "title": "STM32MP1",
727 "scopes": ["stm32mp1-fdts", "fdts stm32mp1"]
728 }
729 ]
730 },
731 {
732 "title": "PIE",
733 "scopes": ["pie"]
734 },
735 {
736 "title": "Security",
737 "scopes": ["security"]
738 },
739 {
740 "title": "SDEI",
741 "scopes": ["sdei"]
742 },
743 {
744 "title": "TBBR",
745 "scopes": ["tbbr"]
746 },
747 {
748 "title": "NXP",
749 "sections": [
750 {
751 "title": "OCRAM",
752 "scopes": ["nxp-ocram", "nxp/common/ocram"]
753 },
754 {
755 "title": "PSCI",
756 "scopes": ["nxp-psci", "plat/nxp/common/psci"]
757 }
758 ]
759 }
760 ]
761 },
762 {
763 "title": "Documentation",
764 "scopes": ["docs", "doc"],
765 "sections": [
766 {
767 "title": "Changelog",
768 "scopes": ["changelog"]
769 },
770 {
771 "title": "Commit Style",
772 "scopes": ["commit-style"]
773 },
774 {
775 "title": "Contribution Guidelines",
776 "scopes": ["contributing", "contribution-guidelines", "docs-contributing.rst"]
777 },
778 {
779 "title": "Maintainers",
780 "scopes": ["maintainers"]
781 },
782 {
783 "title": "Prerequisites",
784 "scopes": ["prerequisites"]
785 }
786 ]
787 },
788 {
789 "title": "Build System",
790 "scopes": ["build", "makefile", "Makefile"],
791 "sections": [
792 {
793 "title": "Git Hooks",
794 "scopes": ["hooks"]
795 }
796 ]
797 },
798 {
799 "title": "Tools",
800 "sections": [
801 {
802 "title": "STM32 Image",
803 "scopes": ["stm32image", "tools/stm32image"]
804 }
805 ]
806 },
807 {
808 "title": "Dependencies",
809 "scopes": ["deps"],
810 "sections": [
811 {
812 "title": "checkpatch",
813 "scopes": ["checkpatch"]
814 },
815 {
816 "title": "libfdt",
817 "scopes": ["libfdt"]
818 },
819 {
820 "title": "Node Package Manager (NPM)",
821 "scopes": ["npm"]
822 }
823 ]
824 }
825 ]
Chris Kay025c87f2021-11-09 20:05:38 +0000[diff] [blame]826}