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Soby Mathewfec4eb72015-07-01 16:16:20 +01001/*
2 * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#include <plat_arm.h>
32
33/*
34 * On ARM platforms, by default the cluster power level is treated as the
35 * highest. The first entry in the power domain descriptor specifies the
36 * number of cluster power domains i.e. 2.
37 */
38#define CSS_PWR_DOMAINS_AT_MAX_PWR_LVL ARM_CLUSTER_COUNT
39
40/*
41 * The CSS power domain tree descriptor. The cluster power domains are
42 * arranged so that when the PSCI generic code creates the power domain tree,
43 * the indices of the CPU power domain nodes it allocates match the linear
44 * indices returned by plat_core_pos_by_mpidr() i.e.
45 * CLUSTER1 CPUs are allocated indices from 0 to 3 and the higher indices for
46 * CLUSTER0 CPUs.
47 */
48const unsigned char arm_power_domain_tree_desc[] = {
49 /* No of root nodes */
50 CSS_PWR_DOMAINS_AT_MAX_PWR_LVL,
51 /* No of children for the first node */
52 PLAT_ARM_CLUSTER1_CORE_COUNT,
53 /* No of children for the second node */
54 PLAT_ARM_CLUSTER0_CORE_COUNT
55};
56
57
58/******************************************************************************
59 * This function implements a part of the critical interface between the psci
60 * generic layer and the platform that allows the former to query the platform
61 * to convert an MPIDR to a unique linear index. An error code (-1) is
62 * returned in case the MPIDR is invalid.
63 *****************************************************************************/
64int plat_core_pos_by_mpidr(u_register_t mpidr)
65{
66 if (arm_check_mpidr(mpidr) == 0)
67 return plat_arm_calc_core_pos(mpidr);
68
69 return -1;
70}