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Deepak Pandey9cbacf62018-08-08 10:32:51 +05301/*
Manish Pandeyb68e2862019-09-11 17:07:40 +01002 * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
Deepak Pandey9cbacf62018-08-08 10:32:51 +05303 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Antonio Nino Diazbd7b7402019-01-25 14:30:04 +00007#include <plat/arm/common/plat_arm.h>
Deepak Pandey9cbacf62018-08-08 10:32:51 +05308
9/* Topology */
10typedef struct n1sdp_topology {
11 const unsigned char *power_tree;
12 unsigned int plat_cluster_core_count;
13} n1sdp_topology_t;
14
15/*
16 * The power domain tree descriptor. The cluster power domains are
17 * arranged so that when the PSCI generic code creates the power domain tree,
18 * the indices of the CPU power domain nodes it allocates match the linear
19 * indices returned by plat_core_pos_by_mpidr().
20 */
21const unsigned char n1sdp_pd_tree_desc[] = {
Manish Pandeyb68e2862019-09-11 17:07:40 +010022 PLAT_N1SDP_CHIP_COUNT,
Deepak Pandey9cbacf62018-08-08 10:32:51 +053023 PLAT_ARM_CLUSTER_COUNT,
Manish Pandeyb68e2862019-09-11 17:07:40 +010024 PLAT_ARM_CLUSTER_COUNT,
25 N1SDP_MAX_CPUS_PER_CLUSTER,
26 N1SDP_MAX_CPUS_PER_CLUSTER,
Deepak Pandey9cbacf62018-08-08 10:32:51 +053027 N1SDP_MAX_CPUS_PER_CLUSTER,
28 N1SDP_MAX_CPUS_PER_CLUSTER
29};
30
31/* Topology configuration for n1sdp */
32const n1sdp_topology_t n1sdp_topology = {
33 .power_tree = n1sdp_pd_tree_desc,
34 .plat_cluster_core_count = N1SDP_MAX_CPUS_PER_CLUSTER
35};
36
37/*******************************************************************************
38 * This function returns the topology tree information.
39 ******************************************************************************/
40const unsigned char *plat_get_power_domain_tree_desc(void)
41{
42 return n1sdp_topology.power_tree;
43}
44
45/*******************************************************************************
46 * This function returns the core count within the cluster corresponding to
47 * `mpidr`.
48 ******************************************************************************/
49unsigned int plat_arm_get_cluster_core_count(u_register_t mpidr)
50{
51 return n1sdp_topology.plat_cluster_core_count;
52}
53
54/*******************************************************************************
55 * The array mapping platform core position (implemented by plat_my_core_pos())
56 * to the SCMI power domain ID implemented by SCP.
57 ******************************************************************************/
58const uint32_t plat_css_core_pos_to_scmi_dmn_id_map[PLATFORM_CORE_COUNT] = {
Manish Pandeyb68e2862019-09-11 17:07:40 +010059 0, 1, 2, 3, 4, 5, 6, 7};