blob: f90136b789b06dba72fe3a017f5acbeecafe560c [file] [log] [blame]
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +00001#
Govindraj Raja0386e312023-08-17 10:41:48 -05002# Copyright (c) 2022-2023, Arm Limited. All rights reserved.
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +00003#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
Govindraj Raja0386e312023-08-17 10:41:48 -05007# This file lists all of the architectural features, and initializes
8# and enables them based on the configured architecture version.
9
10# This file follows the following format:
11# - By default disable any mandatory features.
12# - Then Enable mandatory feature if applicable to an Arch Version.
13# - Disable or enable any optional feature this would be enabled/disabled if needed by platform.
14
15#
16################################################################################
17# Set mandatory features by default to zero.
18################################################################################
19#
20
21#----
22# 8.1
23#----
24
25# Flag to enable access to Privileged Access Never bit of PSTATE.
26ENABLE_FEAT_PAN := 0
27
28# Flag to enable Virtualization Host Extensions.
29ENABLE_FEAT_VHE := 0
30
31#----
32# 8.2
33#----
34
35# Enable RAS Support.
36ENABLE_FEAT_RAS := 0
37
38#----
39# 8.3
40#----
41
42# Flag to enable Pointer Authentication. Internal flag not meant for
43# direct setting. Use BRANCH_PROTECTION to enable PAUTH.
44ENABLE_PAUTH := 0
45
46# Include pointer authentication (ARMv8.3-PAuth) registers in cpu context. This
47# must be set to 1 if the platform wants to use this feature in the Secure
48# world. It is not necessary for use in the Non-secure world.
49CTX_INCLUDE_PAUTH_REGS := 0
50
51#----
52# 8.4
53#----
54
55# Flag to enable Secure EL-2 feature.
56ENABLE_FEAT_SEL2 := 0
57
Govindraj Raja0386e312023-08-17 10:41:48 -050058# By default, disable trace filter control register access to lower non-secure
59# exception levels, i.e. NS-EL2, or NS-EL1 if NS-EL2 is implemented, but
60# trace filter control register access is unused if FEAT_TRF is implemented.
61ENABLE_TRF_FOR_NS := 0
62
63# Flag to enable Data Independent Timing instructions.
64ENABLE_FEAT_DIT := 0
65
66#----
67# 8.5
68#----
69
70# Flag to enable access to the Random Number Generator registers.
71ENABLE_FEAT_RNG := 0
72
73# Flag to enable Speculation Barrier Instruction.
74ENABLE_FEAT_SB := 0
75
76# Flag to enable Branch Target Identification.
77# Internal flag not meant for direct setting.
78# Use BRANCH_PROTECTION to enable BTI.
79ENABLE_BTI := 0
80
81#----
82# 8.6
83#----
84
85# Flag to enable access to the CNTPOFF_EL2 register.
86ENABLE_FEAT_ECV := 0
87
88# Flag to enable access to the HDFGRTR_EL2 register.
89ENABLE_FEAT_FGT := 0
90
91#----
92# 8.7
93#----
94
95# Flag to enable access to the HCRX_EL2 register by setting SCR_EL3.HXEn.
96ENABLE_FEAT_HCX := 0
97
98#----
99# 8.9
100#----
101
102# Flag to enable access to TCR2 (FEAT_TCR2).
103ENABLE_FEAT_TCR2 := 0
104
105#
106################################################################################
107# Enable Mandatory features based on Arch versions.
108################################################################################
109#
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +0000110
111# Enable the features which are mandatory from ARCH version 8.1 and upwards.
112ifeq "8.1" "$(word 1, $(sort 8.1 $(ARM_ARCH_MAJOR).$(ARM_ARCH_MINOR)))"
Govindraj Raja0386e312023-08-17 10:41:48 -0500113ENABLE_FEAT_PAN := 1
114ENABLE_FEAT_VHE := 1
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +0000115endif
116
Manish Pandeyd419e222023-02-13 12:39:17 +0000117# Enable the features which are mandatory from ARCH version 8.2 and upwards.
118ifeq "8.2" "$(word 1, $(sort 8.2 $(ARM_ARCH_MAJOR).$(ARM_ARCH_MINOR)))"
Govindraj Raja0386e312023-08-17 10:41:48 -0500119ENABLE_FEAT_RAS := 1
Manish Pandeyd419e222023-02-13 12:39:17 +0000120endif
121
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +0000122# Enable the features which are mandatory from ARCH version 8.4 and upwards.
123ifeq "8.4" "$(word 1, $(sort 8.4 $(ARM_ARCH_MAJOR).$(ARM_ARCH_MINOR)))"
Govindraj Raja0386e312023-08-17 10:41:48 -0500124ENABLE_FEAT_SEL2 := 1
Govindraj Raja0386e312023-08-17 10:41:48 -0500125ENABLE_TRF_FOR_NS := 1
126ENABLE_FEAT_DIT := 1
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +0000127endif
128
129# Enable the features which are mandatory from ARCH version 8.5 and upwards.
130ifeq "8.5" "$(word 1, $(sort 8.5 $(ARM_ARCH_MAJOR).$(ARM_ARCH_MINOR)))"
Govindraj Raja0386e312023-08-17 10:41:48 -0500131ENABLE_FEAT_RNG := 1
132ENABLE_FEAT_SB := 1
133
134# Enable Memory tagging, Branch Target Identification for aarch64 only.
135ifeq ($(ARCH), aarch64)
136 mem_tag_arch_support := yes
137endif #(ARCH=aarch64)
138
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +0000139endif
140
141# Enable the features which are mandatory from ARCH version 8.6 and upwards.
142ifeq "8.6" "$(word 1, $(sort 8.6 $(ARM_ARCH_MAJOR).$(ARM_ARCH_MINOR)))"
Govindraj Raja0386e312023-08-17 10:41:48 -0500143ENABLE_FEAT_ECV := 1
144ENABLE_FEAT_FGT := 1
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +0000145endif
146
147# Enable the features which are mandatory from ARCH version 8.7 and upwards.
148ifeq "8.7" "$(word 1, $(sort 8.7 $(ARM_ARCH_MAJOR).$(ARM_ARCH_MINOR)))"
Govindraj Raja0386e312023-08-17 10:41:48 -0500149ENABLE_FEAT_HCX := 1
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +0000150endif
Govindraj Raja0386e312023-08-17 10:41:48 -0500151
152# Enable the features which are mandatory from ARCH version 8.9 and upwards.
153ifeq "8.9" "$(word 1, $(sort 8.9 $(ARM_ARCH_MAJOR).$(ARM_ARCH_MINOR)))"
154ENABLE_FEAT_TCR2 := 1
155endif
156
157#
158################################################################################
159# Optional Features defaulted to 0 or 2, if they are not enabled from
160# build option. Can also be disabled or enabled by platform if needed.
161################################################################################
162#
163
164#----
165# 8.0
166#----
167
168# Flag to enable CSV2_2 extension.
169ENABLE_FEAT_CSV2_2 ?= 0
170
171# By default, disable access of trace system registers from NS lower
172# ELs i.e. NS-EL2, or NS-EL1 if NS-EL2 implemented but unused if
173# system register trace is implemented. This feature is available if
174# trace unit such as ETMv4.x, This feature is OPTIONAL and is only
175# permitted in Armv8 implementations.
176ENABLE_SYS_REG_TRACE_FOR_NS ?= 0
177
178#----
179# 8.2
180#----
181
182# Build option to enable/disable the Statistical Profiling Extension,
183# keep it enabled by default for AArch64.
184ifeq (${ARCH},aarch64)
185 ENABLE_SPE_FOR_NS ?= 2
186else ifeq (${ARCH},aarch32)
187 ifdef ENABLE_SPE_FOR_NS
188 $(error ENABLE_SPE_FOR_NS is not supported for AArch32)
189 else
190 ENABLE_SPE_FOR_NS := 0
191 endif
192endif
193
194# Enable SVE for non-secure world by default.
195ifeq (${ARCH},aarch64)
196 ENABLE_SVE_FOR_NS ?= 2
197# SVE is only supported on AArch64 so disable it on AArch32.
198else ifeq (${ARCH},aarch32)
199 ifdef ENABLE_SVE_FOR_NS
200 $(error ENABLE_SVE_FOR_NS is not supported for AArch32)
201 else
202 ENABLE_SVE_FOR_NS := 0
203 endif
204endif
205
206#----
207# 8.4
208#----
209
210# Feature flags for supporting Activity monitor extensions.
211ENABLE_FEAT_AMU ?= 0
212ENABLE_AMU_AUXILIARY_COUNTERS ?= 0
213ENABLE_AMU_FCONF ?= 0
214AMU_RESTRICT_COUNTERS ?= 0
215
216# Build option to enable MPAM for lower ELs.
217ENABLE_MPAM_FOR_LOWER_ELS ?= 0
218
Govindraj Raja3748d902023-09-19 08:43:16 -0500219# Include nested virtualization control (Armv8.4-NV) registers in cpu context.
220# This must be set to 1 if architecture implements Nested Virtualization
221# Extension and platform wants to use this feature in the Secure world.
222CTX_INCLUDE_NEVE_REGS ?= 0
223
Govindraj Raja0386e312023-08-17 10:41:48 -0500224#----
225# 8.5
226#----
227
228# Flag to enable support for EL3 trapping of reads of the RNDR and RNDRRS
229# registers, by setting SCR_EL3.TRNDR.
230ENABLE_FEAT_RNG_TRAP ?= 0
231
232# Include Memory Tagging Extension registers in cpu context. This must be set
233# to 1 if the platform wants to use this feature in the Secure world and MTE is
234# enabled at ELX.
235CTX_INCLUDE_MTE_REGS ?= 0
236
237#----
238# 8.6
239#----
240
241# Flag to enable AMUv1p1 extension.
242ENABLE_FEAT_AMUv1p1 ?= 0
243
244# Flag to enable delayed trapping of WFE instruction (FEAT_TWED).
245ENABLE_FEAT_TWED ?= 0
246
247# In v8.6+ platforms with delayed trapping of WFE being supported
248# via FEAT_TWED, this flag takes the delay value to be set in the
249# SCR_EL3.TWEDEL(4bit) field, when FEAT_TWED is implemented.
250# By default it takes 0, and need to be updated by the platforms.
251TWED_DELAY ?= 0
252
253# Disable MTPMU if FEAT_MTPMU is supported.
254DISABLE_MTPMU ?= 0
255
256#----
257# 8.9
258#----
259
260# Flag to enable NoTagAccess memory region attribute for stage 2 of translation.
261ENABLE_FEAT_MTE_PERM ?= 0
262
263# Flag to enable access to Stage 2 Permission Indirection (FEAT_S2PIE).
264ENABLE_FEAT_S2PIE ?= 0
265
266# Flag to enable access to Stage 1 Permission Indirection (FEAT_S1PIE).
267ENABLE_FEAT_S1PIE ?= 0
268
269# Flag to enable access to Stage 2 Permission Overlay (FEAT_S2POE).
270ENABLE_FEAT_S2POE ?= 0
271
272# Flag to enable access to Stage 1 Permission Overlay (FEAT_S1POE).
273ENABLE_FEAT_S1POE ?= 0
274
275#----
276# 9.0
277#----
278
279# Flag to enable Realm Management Extension (FEAT_RME).
280ENABLE_RME ?= 0
281
282# Scalable Matrix Extension for non-secure world.
283ENABLE_SME_FOR_NS ?= 0
284
285# Scalable Vector Extension for secure world.
286ENABLE_SVE_FOR_SWD ?= 0
287
288# By default, disable access of trace buffer control registers from NS
289# lower ELs i.e. NS-EL2, or NS-EL1 if NS-EL2 implemented but unused
290# if FEAT_TRBE is implemented.
291# Note FEAT_TRBE is only supported on AArch64 - therefore do not enable in
292# AArch32.
293ifeq (${ARCH},aarch64)
294 ENABLE_TRBE_FOR_NS ?= 0
295else ifeq (${ARCH},aarch32)
296 ifdef ENABLE_TRBE_FOR_NS
297 $(error ENABLE_TRBE_FOR_NS is not supported for AArch32)
298 else
299 ENABLE_TRBE_FOR_NS := 0
300 endif
301endif
302
303#----
304# 9.2
305#----
306
307# Scalable Matrix Extension version 2 for non-secure world.
308ENABLE_SME2_FOR_NS ?= 0
309
310# Scalable Matrix Extension for secure world.
311ENABLE_SME_FOR_SWD ?= 0
312
313# By default, disable access to branch record buffer control registers from NS
314# lower ELs i.e. NS-EL2, or NS-EL1 if NS-EL2 implemented but unused
315# if FEAT_BRBE is implemented.
316ENABLE_BRBE_FOR_NS ?= 0
317
318#----
319#9.4
320#----
321
322# Flag to enable access to Guarded Control Stack (FEAT_GCS).
323ENABLE_FEAT_GCS ?= 0