blob: 2bb73cb1ba942b05e72d47ca83cfc955f55e77cb [file] [log] [blame]
developere2be2dd2021-08-19 15:34:43 +08001/*
2 * Copyright (c) 2021, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <string.h>
8#include <common/debug.h>
9#include <lib/mmio.h>
10#include <emi_mpu.h>
11
12#if ENABLE_EMI_MPU_SW_LOCK
13static unsigned char region_lock_state[EMI_MPU_REGION_NUM];
14#endif
15
16#define EMI_MPU_START_MASK (0x00FFFFFF)
17#define EMI_MPU_END_MASK (0x00FFFFFF)
18#define EMI_MPU_APC_SW_LOCK_MASK (0x00FFFFFF)
19#define EMI_MPU_APC_HW_LOCK_MASK (0x80FFFFFF)
20
21static int _emi_mpu_set_protection(unsigned int start, unsigned int end,
22 unsigned int apc)
23{
24 unsigned int dgroup;
25 unsigned int region;
26
27 region = (start >> 24) & 0xFF;
28 start &= EMI_MPU_START_MASK;
29 dgroup = (end >> 24) & 0xFF;
30 end &= EMI_MPU_END_MASK;
31
32 if ((region >= EMI_MPU_REGION_NUM) || (dgroup > EMI_MPU_DGROUP_NUM)) {
33 WARN("invalid region, domain\n");
34 return -1;
35 }
36
37#if ENABLE_EMI_MPU_SW_LOCK
38 if (region_lock_state[region] == 1) {
39 WARN("invalid region\n");
40 return -1;
41 }
42
43 if ((dgroup == 0) && ((apc >> 31) & 0x1)) {
44 region_lock_state[region] = 1;
45 }
46
47 apc &= EMI_MPU_APC_SW_LOCK_MASK;
48#else
49 apc &= EMI_MPU_APC_HW_LOCK_MASK;
50#endif
51
52 if ((start >= DRAM_OFFSET) && (end >= start)) {
53 start -= DRAM_OFFSET;
54 end -= DRAM_OFFSET;
55 } else {
56 WARN("invalid range\n");
57 return -1;
58 }
59
60 mmio_write_32(EMI_MPU_SA(region), start);
61 mmio_write_32(EMI_MPU_EA(region), end);
62 mmio_write_32(EMI_MPU_APC(region, dgroup), apc);
63
64#if defined(SUB_EMI_MPU_BASE)
65 mmio_write_32(SUB_EMI_MPU_SA(region), start);
66 mmio_write_32(SUB_EMI_MPU_EA(region), end);
67 mmio_write_32(SUB_EMI_MPU_APC(region, dgroup), apc);
68#endif
69 return 1;
70}
71
72int emi_mpu_set_protection(struct emi_region_info_t *region_info)
73{
74 unsigned int start, end;
75 int i;
76
77 if (region_info->region >= EMI_MPU_REGION_NUM) {
78 WARN("invalid region\n");
79 return -1;
80 }
81
82 start = (unsigned int)(region_info->start >> EMI_MPU_ALIGN_BITS) |
83 (region_info->region << 24);
84
85 for (i = EMI_MPU_DGROUP_NUM - 1; i >= 0; i--) {
86 end = (unsigned int)(region_info->end >> EMI_MPU_ALIGN_BITS) |
87 (i << 24);
88 _emi_mpu_set_protection(start, end, region_info->apc[i]);
89 }
90
91 return 0;
92}
93
developerfe2308b2021-11-15 18:07:47 +080094void dump_emi_mpu_regions(void)
95{
96 unsigned long apc[EMI_MPU_DGROUP_NUM], sa, ea;
97
98 int region, i;
99
100 /* Only dump 8 regions(max: EMI_MPU_REGION_NUM --> 32) */
101 for (region = 0; region < 8; ++region) {
102 for (i = 0; i < EMI_MPU_DGROUP_NUM; ++i)
103 apc[i] = mmio_read_32(EMI_MPU_APC(region, i));
104 sa = mmio_read_32(EMI_MPU_SA(region));
105 ea = mmio_read_32(EMI_MPU_EA(region));
106
107 INFO("region %d:\n", region);
108 INFO("\tsa:0x%lx, ea:0x%lx, apc0: 0x%lx apc1: 0x%lx\n",
109 sa, ea, apc[0], apc[1]);
110 }
111}
112
developere2be2dd2021-08-19 15:34:43 +0800113void emi_mpu_init(void)
114{
developerfe2308b2021-11-15 18:07:47 +0800115 dump_emi_mpu_regions();
developere2be2dd2021-08-19 15:34:43 +0800116}