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Roberto Vargase92111a2018-05-22 16:05:42 +01001/*
Govindraj Rajaeee28e72023-08-01 15:52:40 -05002 * Copyright (c) 2018, Arm Limited and Contributors. All rights reserved.
Roberto Vargase92111a2018-05-22 16:05:42 +01003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 .globl rom_lib_init
Soby Mathewfcaf1bd2018-10-12 16:40:28 +01008 .extern __DATA_RAM_START__, __DATA_ROM_START__, __DATA_RAM_END__
Roberto Vargase92111a2018-05-22 16:05:42 +01009 .extern memset, memcpy
10
11rom_lib_init:
12 cmp w0, #1
13 mov w0, #0
14 b.le 1f
15 ret
16
171: stp x29, x30, [sp, #-16]!
18 adrp x0, __DATA_RAM_START__
Soby Mathewfcaf1bd2018-10-12 16:40:28 +010019 adrp x1, __DATA_ROM_START__
20 add x1, x1, :lo12:__DATA_ROM_START__
21 adrp x2, __DATA_RAM_END__
22 add x2, x2, :lo12:__DATA_RAM_END__
23 sub x2, x2, x0
Roberto Vargase92111a2018-05-22 16:05:42 +010024 bl memcpy
25
Soby Mathewfcaf1bd2018-10-12 16:40:28 +010026 adrp x0,__BSS_START__
27 add x0, x0, :lo12:__BSS_START__
Roberto Vargase92111a2018-05-22 16:05:42 +010028 mov x1, #0
Soby Mathewfcaf1bd2018-10-12 16:40:28 +010029 adrp x2, __BSS_END__
30 add x2, x2, :lo12:__BSS_END__
31 sub x2, x2, x0
Roberto Vargase92111a2018-05-22 16:05:42 +010032 bl memset
33 ldp x29, x30, [sp], #16
34
35 mov w0, #1
36 ret