| Pankaj Gupta | 90ae1a0 | 2020-12-09 14:02:41 +0530 | [diff] [blame] | 1 | # |
| 2 | # Copyright 2021 NXP |
| 3 | # |
| 4 | # SPDX-License-Identifier: BSD-3-Clause |
| 5 | # |
| 6 | |
| 7 | # board-specific build parameters |
| 8 | |
| 9 | BOOT_MODE ?= flexspi_nor |
| 10 | BOARD ?= lx2160ardb |
| 11 | POVDD_ENABLE := no |
| 12 | NXP_COINED_BB := no |
| 13 | |
| 14 | # DDR Compilation Configs |
| 15 | NUM_OF_DDRC := 2 |
| 16 | DDRC_NUM_DIMM := 2 |
| 17 | DDRC_NUM_CS := 4 |
| 18 | DDR_ECC_EN := yes |
| 19 | #enable address decoding feature |
| 20 | DDR_ADDR_DEC := yes |
| 21 | APPLY_MAX_CDD := yes |
| 22 | |
| 23 | # DDR Errata |
| 24 | ERRATA_DDR_A011396 := 1 |
| 25 | ERRATA_DDR_A050450 := 1 |
| 26 | |
| 27 | # On-Board Flash Details |
| 28 | FLASH_TYPE := MT35XU512A |
| 29 | XSPI_FLASH_SZ := 0x10000000 |
| 30 | NXP_XSPI_NOR_UNIT_SIZE := 0x20000 |
| 31 | BL2_BIN_XSPI_NOR_END_ADDRESS := 0x100000 |
| 32 | # CONFIG_FSPI_ERASE_4K is required to erase 4K sector sizes. This |
| 33 | # config is enabled for future use cases. |
| 34 | FSPI_ERASE_4K := 0 |
| 35 | |
| 36 | # Platform specific features. |
| 37 | WARM_BOOT := no |
| 38 | |
| Pankaj Gupta | 90ae1a0 | 2020-12-09 14:02:41 +0530 | [diff] [blame] | 39 | # Adding Platform files build files |
| 40 | BL2_SOURCES += ${BOARD_PATH}/ddr_init.c\ |
| 41 | ${BOARD_PATH}/platform.c |
| 42 | |
| Jiafei Pan | 7786213 | 2021-04-27 14:49:22 +0800 | [diff] [blame] | 43 | SUPPORTED_BOOT_MODE := flexspi_nor \ |
| 44 | sd \ |
| 45 | emmc |
| 46 | |
| Jiafei Pan | adf14fe | 2021-01-04 15:59:54 +0800 | [diff] [blame] | 47 | # Adding platform board build info |
| 48 | include plat/nxp/common/plat_make_helper/plat_common_def.mk |
| 49 | |
| Pankaj Gupta | 90ae1a0 | 2020-12-09 14:02:41 +0530 | [diff] [blame] | 50 | # Adding SoC build info |
| 51 | include plat/nxp/soc-lx2160a/soc.mk |