Jorge Ramirez-Ortiz | 1d75367 | 2018-09-23 09:41:53 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2015-2018, Renesas Electronics Corporation. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <arch.h> |
| 8 | #include <asm_macros.S> |
| 9 | |
| 10 | #define SCIF_INTERNAL_CLK 0 |
| 11 | #define SCIF_EXTARNAL_CLK 1 |
| 12 | #define SCIF_CLK SCIF_INTERNAL_CLK |
| 13 | |
| 14 | /* product register */ |
| 15 | #define PRR (0xFFF00044) |
| 16 | #define PRR_PRODUCT_MASK (0x00007F00) |
| 17 | #define PRR_CUT_MASK (0x000000FF) |
| 18 | #define PRR_PRODUCT_H3_VER_10 (0x00004F00) |
| 19 | #define PRR_PRODUCT_E3 (0x00005700) |
Marek Vasut | 9fa925d | 2019-01-05 14:16:48 +0100 | [diff] [blame] | 20 | #define PRR_PRODUCT_D3 (0x00005800) |
Jorge Ramirez-Ortiz | 1d75367 | 2018-09-23 09:41:53 +0200 | [diff] [blame] | 21 | |
| 22 | /* module stop */ |
| 23 | #define CPG_BASE (0xE6150000) |
| 24 | #define CPG_SMSTPCR3 (0x013C) |
| 25 | #define CPG_MSTPSR3 (0x0048) |
| 26 | #define MSTP310 (1 << 10) |
| 27 | #define CPG_CPGWPR (0x0900) |
| 28 | |
| 29 | /* scif */ |
| 30 | #define SCIF2_BASE (0xE6E88000) |
| 31 | #define SCIF_SCSMR (0x00) |
| 32 | #define SCIF_SCBRR (0x04) |
| 33 | #define SCIF_SCSCR (0x08) |
| 34 | #define SCIF_SCFTDR (0x0C) |
| 35 | #define SCIF_SCFSR (0x10) |
| 36 | #define SCIF_SCFRDR (0x14) |
| 37 | #define SCIF_SCFCR (0x18) |
| 38 | #define SCIF_SCFDR (0x1C) |
| 39 | #define SCIF_SCSPTR (0x20) |
| 40 | #define SCIF_SCLSR (0x24) |
| 41 | #define SCIF_DL (0x30) |
| 42 | #define SCIF_CKS (0x34) |
| 43 | |
| 44 | /* mode pin */ |
| 45 | #define RST_MODEMR (0xE6160060) |
| 46 | #define MODEMR_MD12 (0x00001000) |
| 47 | |
| 48 | #define SCSMR_CA_MASK (1 << 7) |
| 49 | #define SCSMR_CA_ASYNC (0x0000) |
| 50 | #define SCSMR_CHR_MASK (1 << 6) |
| 51 | #define SCSMR_CHR_8 (0x0000) |
| 52 | #define SCSMR_PE_MASK (1 << 5) |
| 53 | #define SCSMR_PE_DIS (0x0000) |
| 54 | #define SCSMR_STOP_MASK (1 << 3) |
| 55 | #define SCSMR_STOP_1 (0x0000) |
| 56 | #define SCSMR_CKS_MASK (3 << 0) |
| 57 | #define SCSMR_CKS_DIV1 (0x0000) |
| 58 | #define SCSMR_INIT_DATA (SCSMR_CA_ASYNC + \ |
| 59 | SCSMR_CHR_8 + \ |
| 60 | SCSMR_PE_DIS + \ |
| 61 | SCSMR_STOP_1 + \ |
| 62 | SCSMR_CKS_DIV1) |
| 63 | #define SCBRR_115200BPS (17) |
Marek Vasut | 9fa925d | 2019-01-05 14:16:48 +0100 | [diff] [blame] | 64 | #define SCBRR_115200BPSON (16) |
Jorge Ramirez-Ortiz | 1d75367 | 2018-09-23 09:41:53 +0200 | [diff] [blame] | 65 | #define SCBRR_115200BPS_E3_SSCG (15) |
| 66 | #define SCBRR_230400BPS (8) |
| 67 | |
| 68 | #define SCSCR_TE_MASK (1 << 5) |
| 69 | #define SCSCR_TE_DIS (0x0000) |
| 70 | #define SCSCR_TE_EN (0x0020) |
| 71 | #define SCSCR_RE_MASK (1 << 4) |
| 72 | #define SCSCR_RE_DIS (0x0000) |
| 73 | #define SCSCR_RE_EN (0x0010) |
| 74 | #define SCSCR_CKE_MASK (3 << 0) |
| 75 | #define SCSCR_CKE_INT (0x0000) |
| 76 | #define SCSCR_CKE_BRG (0x0002) |
| 77 | #if SCIF_CLK == SCIF_EXTARNAL_CLK |
| 78 | #define SCSCR_CKE_INT_CLK (SCSCR_CKE_BRG) |
| 79 | #else |
Marek Vasut | aae2c72 | 2018-12-27 20:31:22 +0100 | [diff] [blame] | 80 | #define SCFSR_TEND_MASK (1 << 6) |
| 81 | #define SCFSR_TEND_TRANS_END (0x0040) |
Jorge Ramirez-Ortiz | 1d75367 | 2018-09-23 09:41:53 +0200 | [diff] [blame] | 82 | #define SCSCR_CKE_INT_CLK (SCSCR_CKE_INT) |
| 83 | #endif |
| 84 | #define SCFSR_INIT_DATA (0x0000) |
| 85 | #define SCFCR_TTRG_MASK (3 << 4) |
| 86 | #define SCFCR_TTRG_8 (0x0000) |
| 87 | #define SCFCR_TTRG_0 (0x0030) |
| 88 | #define SCFCR_TFRST_MASK (1 << 2) |
| 89 | #define SCFCR_TFRST_DIS (0x0000) |
| 90 | #define SCFCR_TFRST_EN (0x0004) |
| 91 | #define SCFCR_RFRS_MASK (1 << 1) |
| 92 | #define SCFCR_RFRS_DIS (0x0000) |
| 93 | #define SCFCR_RFRS_EN (0x0002) |
| 94 | #define SCFCR_INIT_DATA (SCFCR_TTRG_8) |
| 95 | #define SCFDR_T_MASK (0x1f << 8) |
| 96 | #define DL_INIT_DATA (8) |
| 97 | #define CKS_CKS_DIV_MASK (1 << 15) |
| 98 | #define CKS_CKS_DIV_CLK (0x0000) |
| 99 | #define CKS_XIN_MASK (1 << 14) |
| 100 | #define CKS_XIN_SCIF_CLK (0x0000) |
| 101 | #define CKS_INIT_DATA (CKS_CKS_DIV_CLK + CKS_XIN_SCIF_CLK) |
| 102 | |
| 103 | .globl console_init |
| 104 | .globl console_uninit |
| 105 | .globl console_putc |
| 106 | .globl console_core_init |
| 107 | .globl console_core_putc |
| 108 | .globl console_getc |
| 109 | .globl console_flush |
| 110 | |
| 111 | /* |
| 112 | * The console base is in the data section and not in .bss |
| 113 | * even though it is zero-init. In particular, this allows |
| 114 | * the console functions to start using this variable before |
| 115 | * the runtime memory is initialized for images which do not |
| 116 | * need to copy the .data section from ROM to RAM. |
| 117 | */ |
| 118 | /* ----------------------------------------------- |
| 119 | * int console_init(unsigned long base_addr, |
| 120 | * unsigned int uart_clk, unsigned int baud_rate) |
| 121 | * Function to initialize the console without a |
| 122 | * C Runtime to print debug information. It saves |
| 123 | * the console base to the data section. |
| 124 | * In: x0 - console base address |
| 125 | * w1 - Uart clock in Hz |
| 126 | * w2 - Baud rate |
| 127 | * out: return 1 on success. |
| 128 | * Clobber list : x1 - x3 |
| 129 | * ----------------------------------------------- |
| 130 | */ |
| 131 | func console_init |
| 132 | b console_core_init |
| 133 | endfunc console_init |
| 134 | |
| 135 | func console_uninit |
| 136 | ret |
| 137 | endfunc console_uninit |
| 138 | |
| 139 | /* ----------------------------------------------- |
| 140 | * int console_core_init(unsigned long base_addr, |
| 141 | * unsigned int uart_clk, unsigned int baud_rate) |
| 142 | * Function to initialize the console without a |
| 143 | * C Runtime to print debug information. This |
| 144 | * function will be accessed by console_init and |
| 145 | * crash reporting. |
| 146 | * In: x0 - console base address |
| 147 | * w1 - Uart clock in Hz |
| 148 | * w2 - Baud rate |
| 149 | * Out: return 1 on success |
| 150 | * Clobber list : x1, x2 |
| 151 | * ----------------------------------------------- |
| 152 | */ |
| 153 | func console_core_init |
| 154 | ldr x0, =CPG_BASE |
| 155 | ldr w1, [x0, #CPG_SMSTPCR3] |
| 156 | and w1, w1, #~MSTP310 /* MSTP310=0 */ |
| 157 | mvn w2, w1 |
| 158 | str w2, [x0, #CPG_CPGWPR] |
| 159 | str w1, [x0, #CPG_SMSTPCR3] |
| 160 | 5: |
| 161 | ldr w1, [x0, #CPG_MSTPSR3] |
| 162 | and w1, w1, #MSTP310 |
| 163 | cbnz w1, 5b |
| 164 | |
| 165 | ldr x0, =SCIF2_BASE |
| 166 | /* Clear bits TE and RE in SCSCR to 0 */ |
| 167 | mov w1, #(SCSCR_TE_DIS + SCSCR_RE_DIS) |
| 168 | strh w1, [x0, #SCIF_SCSCR] |
| 169 | /* Set bits TFRST and RFRST in SCFCR to 1 */ |
| 170 | ldrh w1, [x0, #SCIF_SCFCR] |
| 171 | orr w1, w1, #(SCFCR_TFRST_EN + SCFCR_RFRS_EN) |
| 172 | strh w1, [x0, #SCIF_SCFCR] |
| 173 | /* Read flags of ER, DR, BRK, and RDF in SCFSR and those of TO and ORER |
| 174 | in SCLSR, then clear them to 0 */ |
| 175 | mov w1, #SCFSR_INIT_DATA |
| 176 | strh w1, [x0, #SCIF_SCFSR] |
| 177 | mov w1, #0 |
| 178 | strh w1, [x0, #SCIF_SCLSR] |
| 179 | /* Set bits CKE[1:0] in SCSCR */ |
| 180 | ldrh w1, [x0, #SCIF_SCSCR] |
| 181 | and w1, w1, #~SCSCR_CKE_MASK |
| 182 | mov w2, #SCSCR_CKE_INT_CLK |
| 183 | orr w1, w1, w2 |
| 184 | strh w1, [x0, #SCIF_SCSCR] |
| 185 | /* Set data transfer format in SCSMR */ |
| 186 | mov w1, #SCSMR_INIT_DATA |
| 187 | strh w1, [x0, #SCIF_SCSMR] |
| 188 | /* Set value in SCBRR */ |
| 189 | #if SCIF_CLK == SCIF_INTERNAL_CLK |
| 190 | ldr x1, =PRR |
| 191 | ldr w1, [x1] |
| 192 | and w1, w1, #(PRR_PRODUCT_MASK | PRR_CUT_MASK) |
| 193 | mov w2, #PRR_PRODUCT_H3_VER_10 |
| 194 | cmp w1, w2 |
| 195 | beq 3f |
| 196 | and w1, w1, #PRR_PRODUCT_MASK |
Marek Vasut | 9fa925d | 2019-01-05 14:16:48 +0100 | [diff] [blame] | 197 | mov w2, #PRR_PRODUCT_D3 |
| 198 | cmp w1, w2 |
| 199 | beq 4f |
| 200 | and w1, w1, #PRR_PRODUCT_MASK |
Jorge Ramirez-Ortiz | 1d75367 | 2018-09-23 09:41:53 +0200 | [diff] [blame] | 201 | mov w2, #PRR_PRODUCT_E3 |
| 202 | cmp w1, w2 |
Marek Vasut | 9fa925d | 2019-01-05 14:16:48 +0100 | [diff] [blame] | 203 | bne 5f |
Jorge Ramirez-Ortiz | 1d75367 | 2018-09-23 09:41:53 +0200 | [diff] [blame] | 204 | |
| 205 | ldr x1, =RST_MODEMR |
| 206 | ldr w1, [x1] |
| 207 | and w1, w1, #MODEMR_MD12 |
| 208 | mov w2, #MODEMR_MD12 |
| 209 | cmp w1, w2 |
Marek Vasut | 9fa925d | 2019-01-05 14:16:48 +0100 | [diff] [blame] | 210 | bne 5f |
Jorge Ramirez-Ortiz | 1d75367 | 2018-09-23 09:41:53 +0200 | [diff] [blame] | 211 | |
| 212 | mov w1, #SCBRR_115200BPS_E3_SSCG |
| 213 | b 2f |
Marek Vasut | 9fa925d | 2019-01-05 14:16:48 +0100 | [diff] [blame] | 214 | 5: |
Jorge Ramirez-Ortiz | 1d75367 | 2018-09-23 09:41:53 +0200 | [diff] [blame] | 215 | mov w1, #SCBRR_115200BPS |
| 216 | b 2f |
Marek Vasut | 9fa925d | 2019-01-05 14:16:48 +0100 | [diff] [blame] | 217 | 4: |
| 218 | mov w1, #SCBRR_115200BPSON |
| 219 | b 2f |
Jorge Ramirez-Ortiz | 1d75367 | 2018-09-23 09:41:53 +0200 | [diff] [blame] | 220 | 3: |
| 221 | mov w1, #SCBRR_230400BPS |
| 222 | 2: |
| 223 | strb w1, [x0, SCIF_SCBRR] |
| 224 | #else |
| 225 | mov w1, #DL_INIT_DATA |
| 226 | strh w1, [x0, #SCIF_DL] |
| 227 | mov w1, #CKS_INIT_DATA |
| 228 | strh w1, [x0, #SCIF_CKS] |
| 229 | #endif |
| 230 | /* 1-bit interval elapsed */ |
| 231 | mov w1, #100 |
| 232 | 1: |
| 233 | subs w1, w1, #1 |
| 234 | cbnz w1, 1b |
| 235 | /* |
| 236 | * Set bits RTRG[1:0], TTRG[1:0], and MCE in SCFCR |
| 237 | * Clear bits FRST and RFRST to 0 |
| 238 | */ |
| 239 | mov w1, #SCFCR_INIT_DATA |
| 240 | strh w1, [x0, #SCIF_SCFCR] |
| 241 | /* Set bits TE and RE in SCSCR to 1 */ |
| 242 | ldrh w1, [x0, #SCIF_SCSCR] |
| 243 | orr w1, w1, #(SCSCR_TE_EN + SCSCR_RE_EN) |
| 244 | strh w1, [x0, #SCIF_SCSCR] |
| 245 | mov x0, #1 |
| 246 | |
| 247 | ret |
| 248 | endfunc console_core_init |
| 249 | |
| 250 | /* --------------------------------------------- |
| 251 | * int console_putc(int c) |
| 252 | * Function to output a character over the |
| 253 | * console. It returns the character printed on |
| 254 | * success or -1 on error. |
| 255 | * In : x0 - character to be printed |
| 256 | * Out : return -1 on error else return character. |
| 257 | * Clobber list : x1, x2 |
| 258 | * --------------------------------------------- |
| 259 | */ |
| 260 | func console_putc |
| 261 | b console_core_putc |
| 262 | endfunc console_putc |
| 263 | |
| 264 | /* -------------------------------------------------------- |
| 265 | * int console_core_putc(int c, unsigned int base_addr) |
| 266 | * Function to output a character over the console. It |
| 267 | * returns the character printed on success or -1 on error. |
| 268 | * In : w0 - character to be printed |
| 269 | * x1 - console base address |
| 270 | * Out : return -1 on error else return character. |
| 271 | * Clobber list : x2 |
| 272 | * -------------------------------------------------------- |
| 273 | */ |
| 274 | func console_core_putc |
| 275 | ldr x1, =SCIF2_BASE |
| 276 | cmp w0, #0xA |
| 277 | /* Prepend '\r' to '\n' */ |
| 278 | bne 2f |
| 279 | 1: |
| 280 | /* Check if the transmit FIFO is full */ |
| 281 | ldrh w2, [x1, #SCIF_SCFDR] |
| 282 | ubfx w2, w2, #8, #5 |
| 283 | cmp w2, #16 |
| 284 | bcs 1b |
| 285 | mov w2, #0x0D |
| 286 | strb w2, [x1, #SCIF_SCFTDR] |
| 287 | 2: |
| 288 | /* Check if the transmit FIFO is full */ |
| 289 | ldrh w2, [x1, #SCIF_SCFDR] |
| 290 | ubfx w2, w2, #8, #5 |
| 291 | cmp w2, #16 |
| 292 | bcs 2b |
| 293 | strb w0, [x1, #SCIF_SCFTDR] |
| 294 | |
Marek Vasut | aae2c72 | 2018-12-27 20:31:22 +0100 | [diff] [blame] | 295 | /* Clear TEND flag */ |
| 296 | ldrh w2, [x1, #SCIF_SCFSR] |
| 297 | and w2, w2, #~SCFSR_TEND_MASK |
| 298 | strh w2, [x1, #SCIF_SCFSR] |
| 299 | |
Jorge Ramirez-Ortiz | 1d75367 | 2018-09-23 09:41:53 +0200 | [diff] [blame] | 300 | ret |
| 301 | endfunc console_core_putc |
| 302 | |
| 303 | /* --------------------------------------------- |
| 304 | * int console_getc(void) |
| 305 | * Function to get a character from the console. |
| 306 | * It returns the character grabbed on success |
| 307 | * or -1 on error. |
| 308 | * Clobber list : x0, x1 |
| 309 | * --------------------------------------------- |
| 310 | */ |
| 311 | func console_getc |
| 312 | mov w0, #-1 |
| 313 | ret |
| 314 | endfunc console_getc |
| 315 | |
| 316 | /* --------------------------------------------- |
| 317 | * int console_flush(void) |
| 318 | * Function to force a write of all buffered |
| 319 | * data that hasn't been output. It returns 0 |
| 320 | * upon successful completion, otherwise it |
| 321 | * returns -1. |
| 322 | * Clobber list : x0, x1 |
| 323 | * --------------------------------------------- |
| 324 | */ |
| 325 | func console_flush |
| 326 | ldr x0, =SCIF2_BASE |
| 327 | 1: |
Marek Vasut | aae2c72 | 2018-12-27 20:31:22 +0100 | [diff] [blame] | 328 | /* Check TEND flag */ |
| 329 | ldrh w1, [x0, #SCIF_SCFSR] |
| 330 | and w1, w1, #SCFSR_TEND_MASK |
| 331 | cmp w1, #SCFSR_TEND_TRANS_END |
Jorge Ramirez-Ortiz | 1d75367 | 2018-09-23 09:41:53 +0200 | [diff] [blame] | 332 | bne 1b |
| 333 | |
Jorge Ramirez-Ortiz | 1d75367 | 2018-09-23 09:41:53 +0200 | [diff] [blame] | 334 | ldr x0, =SCIF2_BASE |
| 335 | ldrh w1, [x0, #SCIF_SCSCR] |
| 336 | and w1, w1, #~(SCSCR_TE_EN + SCSCR_RE_EN) |
| 337 | strh w1, [x0, #SCIF_SCSCR] |
| 338 | |
| 339 | mov w0, #0 |
| 340 | ret |
| 341 | endfunc console_flush |