Caesar Wang | a845690 | 2016-10-27 01:12:34 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | * SPDX-License-Identifier: BSD-3-Clause |
Caesar Wang | a845690 | 2016-10-27 01:12:34 +0800 | [diff] [blame] | 5 | */ |
| 6 | |
Antonio Nino Diaz | 5eb8837 | 2018-11-08 10:20:19 +0000 | [diff] [blame] | 7 | #ifndef DFS_H |
| 8 | #define DFS_H |
Caesar Wang | a845690 | 2016-10-27 01:12:34 +0800 | [diff] [blame] | 9 | |
Paul Kocialkowski | e0f2c3b | 2018-06-13 20:37:25 +0200 | [diff] [blame] | 10 | #include <stdint.h> |
| 11 | |
Caesar Wang | a845690 | 2016-10-27 01:12:34 +0800 | [diff] [blame] | 12 | struct rk3399_sdram_default_config { |
| 13 | unsigned char bl; |
| 14 | /* 1:auto precharge, 0:never auto precharge */ |
| 15 | unsigned char ap; |
| 16 | /* dram driver strength */ |
| 17 | unsigned char dramds; |
| 18 | /* dram ODT, if odt=0, this parameter invalid */ |
| 19 | unsigned char dramodt; |
| 20 | /* ca ODT, if odt=0, this parameter invalid |
| 21 | * only used by LPDDR4 |
| 22 | */ |
| 23 | unsigned char caodt; |
| 24 | unsigned char burst_ref_cnt; |
| 25 | /* zqcs period, unit(s) */ |
| 26 | unsigned char zqcsi; |
| 27 | }; |
| 28 | |
Caesar Wang | a845690 | 2016-10-27 01:12:34 +0800 | [diff] [blame] | 29 | struct drv_odt_lp_config { |
Caesar Wang | a845690 | 2016-10-27 01:12:34 +0800 | [diff] [blame] | 30 | uint32_t pd_idle; |
| 31 | uint32_t sr_idle; |
| 32 | uint32_t sr_mc_gate_idle; |
| 33 | uint32_t srpd_lite_idle; |
| 34 | uint32_t standby_idle; |
Derek Basehore | ff461d0 | 2016-10-20 20:46:43 -0700 | [diff] [blame] | 35 | uint32_t odt_en; |
Caesar Wang | a845690 | 2016-10-27 01:12:34 +0800 | [diff] [blame] | 36 | |
| 37 | uint32_t dram_side_drv; |
| 38 | uint32_t dram_side_dq_odt; |
| 39 | uint32_t dram_side_ca_odt; |
Caesar Wang | a845690 | 2016-10-27 01:12:34 +0800 | [diff] [blame] | 40 | }; |
| 41 | |
Caesar Wang | a845690 | 2016-10-27 01:12:34 +0800 | [diff] [blame] | 42 | uint32_t ddr_set_rate(uint32_t hz); |
| 43 | uint32_t ddr_round_rate(uint32_t hz); |
| 44 | uint32_t ddr_get_rate(void); |
Derek Basehore | ff461d0 | 2016-10-20 20:46:43 -0700 | [diff] [blame] | 45 | uint32_t dram_set_odt_pd(uint32_t arg0, uint32_t arg1, uint32_t arg2); |
| 46 | void dram_dfs_init(void); |
Derek Basehore | e13bc54 | 2017-02-24 14:31:36 +0800 | [diff] [blame] | 47 | void ddr_prepare_for_sys_suspend(void); |
| 48 | void ddr_prepare_for_sys_resume(void); |
| 49 | |
Antonio Nino Diaz | 5eb8837 | 2018-11-08 10:20:19 +0000 | [diff] [blame] | 50 | #endif /* DFS_H */ |