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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Soby Mathew0d786072016-03-24 16:56:29 +00002 * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
Dan Handleyea596682015-04-01 17:34:24 +010030#ifndef __ASM_MACROS_S__
31#define __ASM_MACROS_S__
Achin Gupta4f6ad662013-10-25 09:08:21 +010032
Dan Handley2bd4ef22014-04-09 13:14:54 +010033#include <arch.h>
Soby Mathewb9ff2fd2016-07-08 15:26:35 +010034#include <asm_macros_common.S>
Dan Handley2bd4ef22014-04-09 13:14:54 +010035
36
Achin Gupta4f6ad662013-10-25 09:08:21 +010037 .macro func_prologue
38 stp x29, x30, [sp, #-0x10]!
39 mov x29,sp
40 .endm
41
42 .macro func_epilogue
43 ldp x29, x30, [sp], #0x10
44 .endm
45
46
47 .macro dcache_line_size reg, tmp
Achin Gupta07f4e072014-02-02 12:02:23 +000048 mrs \tmp, ctr_el0
Achin Gupta4f6ad662013-10-25 09:08:21 +010049 ubfx \tmp, \tmp, #16, #4
Achin Gupta07f4e072014-02-02 12:02:23 +000050 mov \reg, #4
51 lsl \reg, \reg, \tmp
Achin Gupta4f6ad662013-10-25 09:08:21 +010052 .endm
53
54
55 .macro icache_line_size reg, tmp
Achin Gupta07f4e072014-02-02 12:02:23 +000056 mrs \tmp, ctr_el0
57 and \tmp, \tmp, #0xf
58 mov \reg, #4
59 lsl \reg, \reg, \tmp
Achin Gupta4f6ad662013-10-25 09:08:21 +010060 .endm
61
62
Achin Gupta4f6ad662013-10-25 09:08:21 +010063 .macro smc_check label
Andrew Thoelkef977ed82014-04-28 12:32:02 +010064 mrs x0, esr_el3
Achin Gupta4f6ad662013-10-25 09:08:21 +010065 ubfx x0, x0, #ESR_EC_SHIFT, #ESR_EC_LENGTH
66 cmp x0, #EC_AARCH64_SMC
67 b.ne $label
68 .endm
69
Sandrine Bailleux9e6ad6c2016-05-24 16:56:03 +010070 /*
71 * Declare the exception vector table, enforcing it is aligned on a
72 * 2KB boundary, as required by the ARMv8 architecture.
Sandrine Bailleux618ba992016-05-24 16:22:59 +010073 * Use zero bytes as the fill value to be stored in the padding bytes
74 * so that it inserts illegal AArch64 instructions. This increases
75 * security, robustness and potentially facilitates debugging.
Sandrine Bailleux9e6ad6c2016-05-24 16:56:03 +010076 */
77 .macro vector_base label
78 .section .vectors, "ax"
Sandrine Bailleux618ba992016-05-24 16:22:59 +010079 .align 11, 0
Sandrine Bailleux9e6ad6c2016-05-24 16:56:03 +010080 \label:
81 .endm
82
83 /*
84 * Create an entry in the exception vector table, enforcing it is
85 * aligned on a 128-byte boundary, as required by the ARMv8 architecture.
Sandrine Bailleux618ba992016-05-24 16:22:59 +010086 * Use zero bytes as the fill value to be stored in the padding bytes
87 * so that it inserts illegal AArch64 instructions. This increases
88 * security, robustness and potentially facilitates debugging.
Sandrine Bailleux9e6ad6c2016-05-24 16:56:03 +010089 */
90 .macro vector_entry label
91 .section .vectors, "ax"
Sandrine Bailleux618ba992016-05-24 16:22:59 +010092 .align 7, 0
Sandrine Bailleux9e6ad6c2016-05-24 16:56:03 +010093 \label:
94 .endm
Achin Gupta4f6ad662013-10-25 09:08:21 +010095
Jeenu Viswambharana7934d62014-02-07 15:53:18 +000096 /*
Sandrine Bailleux9e6ad6c2016-05-24 16:56:03 +010097 * This macro verifies that the given vector doesn't exceed the
Jeenu Viswambharana7934d62014-02-07 15:53:18 +000098 * architectural limit of 32 instructions. This is meant to be placed
Sandrine Bailleux9e6ad6c2016-05-24 16:56:03 +010099 * immediately after the last instruction in the vector. It takes the
Jeenu Viswambharana7934d62014-02-07 15:53:18 +0000100 * vector entry as the parameter
101 */
102 .macro check_vector_size since
103 .if (. - \since) > (32 * 4)
104 .error "Vector exceeds 32 instructions"
105 .endif
106 .endm
Andrew Thoelke38bde412014-03-18 13:46:55 +0000107
Soby Mathew981487a2015-07-13 14:10:57 +0100108#if ENABLE_PLAT_COMPAT
Andrew Thoelke65668f92014-03-20 10:48:23 +0000109 /*
110 * This macro calculates the base address of an MP stack using the
111 * platform_get_core_pos() index, the name of the stack storage and
112 * the size of each stack
113 * In: X0 = MPIDR of CPU whose stack is wanted
114 * Out: X0 = physical address of stack base
115 * Clobber: X30, X1, X2
116 */
117 .macro get_mp_stack _name, _size
118 bl platform_get_core_pos
119 ldr x2, =(\_name + \_size)
120 mov x1, #\_size
121 madd x0, x0, x1, x2
122 .endm
Soby Mathew981487a2015-07-13 14:10:57 +0100123#endif
Andrew Thoelke65668f92014-03-20 10:48:23 +0000124
125 /*
Soby Mathewb0082d22015-04-09 13:40:55 +0100126 * This macro calculates the base address of the current CPU's MP stack
127 * using the plat_my_core_pos() index, the name of the stack storage
128 * and the size of each stack
129 * Out: X0 = physical address of stack base
130 * Clobber: X30, X1, X2
131 */
132 .macro get_my_mp_stack _name, _size
133 bl plat_my_core_pos
134 ldr x2, =(\_name + \_size)
135 mov x1, #\_size
136 madd x0, x0, x1, x2
137 .endm
138
139 /*
Andrew Thoelke65668f92014-03-20 10:48:23 +0000140 * This macro calculates the base address of a UP stack using the
141 * name of the stack storage and the size of the stack
142 * Out: X0 = physical address of stack base
143 */
144 .macro get_up_stack _name, _size
145 ldr x0, =(\_name + \_size)
146 .endm
Soby Mathew066f7132014-07-14 16:57:23 +0100147
148 /*
149 * Helper macro to generate the best mov/movk combinations according
150 * the value to be moved. The 16 bits from '_shift' are tested and
151 * if not zero, they are moved into '_reg' without affecting
152 * other bits.
153 */
154 .macro _mov_imm16 _reg, _val, _shift
155 .if (\_val >> \_shift) & 0xffff
156 .if (\_val & (1 << \_shift - 1))
157 movk \_reg, (\_val >> \_shift) & 0xffff, LSL \_shift
158 .else
159 mov \_reg, \_val & (0xffff << \_shift)
160 .endif
161 .endif
162 .endm
163
164 /*
165 * Helper macro to load arbitrary values into 32 or 64-bit registers
166 * which generates the best mov/movk combinations. Many base addresses
167 * are 64KB aligned the macro will eliminate updating bits 15:0 in
168 * that case
169 */
170 .macro mov_imm _reg, _val
171 .if (\_val) == 0
172 mov \_reg, #0
173 .else
174 _mov_imm16 \_reg, (\_val), 0
175 _mov_imm16 \_reg, (\_val), 16
176 _mov_imm16 \_reg, (\_val), 32
177 _mov_imm16 \_reg, (\_val), 48
178 .endif
179 .endm
Dan Handleyea596682015-04-01 17:34:24 +0100180
Jeenu Viswambharan68aef102016-11-30 15:21:11 +0000181 /*
182 * Macro to mark instances where we're jumping to a function and don't
183 * expect a return. To provide the function being jumped to with
184 * additional information, we use 'bl' instruction to jump rather than
185 * 'b'.
186 *
187 * Debuggers infer the location of a call from where LR points to, which
188 * is usually the instruction after 'bl'. If this macro expansion
189 * happens to be the last location in a function, that'll cause the LR
190 * to point a location beyond the function, thereby misleading debugger
191 * back trace. We therefore insert a 'nop' after the function call for
192 * debug builds, unless 'skip_nop' parameter is non-zero.
193 */
194 .macro no_ret _func:req, skip_nop=0
195 bl \_func
196#if DEBUG
197 .ifeq \skip_nop
198 nop
199 .endif
200#endif
201 .endm
202
Dan Handleyea596682015-04-01 17:34:24 +0100203#endif /* __ASM_MACROS_S__ */