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Jacky Bai7ec94512023-09-21 14:01:37 +08001/*
2 * Copyright 2021-2024 NXP
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef IMX8ULP_XRDC_H
8#define IMX8ULP_XRDC_H
9
10#define DID_MAX 8
11#define PAC_SLOT_ALL 128
12#define MSC_SLOT_ALL 8
13
14enum xrdc_mda_sa {
15 MDA_SA_S,
16 MDA_SA_NS,
17 MDA_SA_PT, /* pass through master's secure/nonsecure attribute */
18};
19
20struct xrdc_mda_config {
21 uint16_t mda_id;
22 uint16_t did;
23 enum xrdc_mda_sa sa;
24};
25
26struct xrdc_pac_msc_config {
27 uint16_t pac_msc_id;
28 uint16_t slot_id;
29 uint8_t dsel[DID_MAX];
30};
31
32struct xrdc_mrc_config {
33 uint16_t mrc_id;
34 uint16_t region_id;
35 uint32_t region_start;
36 uint32_t region_size;
37 uint8_t dsel[DID_MAX];
38 uint16_t accset[2];
39};
40
41/* APIs to apply and enable XRDC */
42int xrdc_apply_lpav_config(void);
43int xrdc_apply_hifi_config(void);
44int xrdc_apply_apd_config(void);
45void xrdc_enable(void);
46
47#endif