| Xing Zheng | c39aacd | 2016-12-22 18:34:14 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame^] | 4 | * SPDX-License-Identifier: BSD-3-Clause |
| Xing Zheng | c39aacd | 2016-12-22 18:34:14 +0800 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #ifndef __PLAT_ROCKCHIP_RK3399_INCLUDE_SHARED_BL31_PARAM_H__ |
| 8 | #define __PLAT_ROCKCHIP_RK3399_INCLUDE_SHARED_BL31_PARAM_H__ |
| 9 | |
| 10 | /******************************************************************************* |
| 11 | * Platform memory map related constants |
| 12 | ******************************************************************************/ |
| 13 | /* TF text, ro, rw, Size: 1MB */ |
| 14 | #define TZRAM_BASE (0x0) |
| 15 | #define TZRAM_SIZE (0x100000) |
| 16 | |
| 17 | /******************************************************************************* |
| 18 | * BL31 specific defines. |
| 19 | ******************************************************************************/ |
| 20 | /* |
| 21 | * Put BL3-1 at the top of the Trusted RAM |
| 22 | */ |
| 23 | #define BL31_BASE (TZRAM_BASE + 0x1000) |
| 24 | #define BL31_LIMIT (TZRAM_BASE + TZRAM_SIZE) |
| 25 | |
| 26 | #endif /*__PLAT_ROCKCHIP_RK3399_INCLUDE_SHARED_BL31_PARAM_H__*/ |