| Soby Mathew | 748be1d | 2016-05-05 14:10:46 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are met: |
| 6 | * |
| 7 | * Redistributions of source code must retain the above copyright notice, this |
| 8 | * list of conditions and the following disclaimer. |
| 9 | * |
| 10 | * Redistributions in binary form must reproduce the above copyright notice, |
| 11 | * this list of conditions and the following disclaimer in the documentation |
| 12 | * and/or other materials provided with the distribution. |
| 13 | * |
| 14 | * Neither the name of ARM nor the names of its contributors may be used |
| 15 | * to endorse or promote products derived from this software without specific |
| 16 | * prior written permission. |
| 17 | * |
| 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 22 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 28 | * POSSIBILITY OF SUCH DAMAGE. |
| 29 | */ |
| 30 | #ifndef __CPU_MACROS_S__ |
| 31 | #define __CPU_MACROS_S__ |
| 32 | |
| 33 | #include <arch.h> |
| 34 | |
| 35 | #define CPU_IMPL_PN_MASK (MIDR_IMPL_MASK << MIDR_IMPL_SHIFT) | \ |
| 36 | (MIDR_PN_MASK << MIDR_PN_SHIFT) |
| 37 | |
| 38 | /* |
| 39 | * Define the offsets to the fields in cpu_ops structure. |
| 40 | */ |
| 41 | .struct 0 |
| 42 | CPU_MIDR: /* cpu_ops midr */ |
| 43 | .space 4 |
| 44 | /* Reset fn is needed during reset */ |
| 45 | CPU_RESET_FUNC: /* cpu_ops reset_func */ |
| 46 | .space 4 |
| 47 | CPU_PWR_DWN_CORE: /* cpu_ops core_pwr_dwn */ |
| 48 | .space 4 |
| 49 | CPU_PWR_DWN_CLUSTER: /* cpu_ops cluster_pwr_dwn */ |
| 50 | .space 4 |
| 51 | CPU_OPS_SIZE = . |
| 52 | |
| 53 | /* |
| 54 | * Convenience macro to declare cpu_ops structure. |
| 55 | * Make sure the structure fields are as per the offsets |
| 56 | * defined above. |
| 57 | */ |
| 58 | .macro declare_cpu_ops _name:req, _midr:req, _noresetfunc = 0 |
| 59 | .section cpu_ops, "a" |
| 60 | .align 2 |
| 61 | .type cpu_ops_\_name, %object |
| 62 | .word \_midr |
| 63 | .if \_noresetfunc |
| 64 | .word 0 |
| 65 | .else |
| 66 | .word \_name\()_reset_func |
| 67 | .endif |
| 68 | .word \_name\()_core_pwr_dwn |
| 69 | .word \_name\()_cluster_pwr_dwn |
| 70 | .endm |
| 71 | |
| 72 | #endif /* __CPU_MACROS_S__ */ |