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Soby Mathew44170c42016-03-22 15:51:08 +00001/*
2 * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
3 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Soby Mathew44170c42016-03-22 15:51:08 +00005 */
6
7#ifndef __XLAT_TABLES_PRIVATE_H__
8#define __XLAT_TABLES_PRIVATE_H__
9
Antonio Nino Diazd48ae612016-08-02 09:21:41 +010010#include <cassert.h>
Antonio Nino Diazd1beee22016-12-13 15:28:54 +000011#include <platform_def.h>
Scott Brandenbf404c02017-04-10 11:45:52 -070012#include <utils_def.h>
Antonio Nino Diazd48ae612016-08-02 09:21:41 +010013
Antonio Nino Diazd1beee22016-12-13 15:28:54 +000014/*
15 * If the platform hasn't defined a physical and a virtual address space size
16 * default to ADDR_SPACE_SIZE.
17 */
18#if ERROR_DEPRECATED
19# ifdef ADDR_SPACE_SIZE
20# error "ADDR_SPACE_SIZE is deprecated. Use PLAT_xxx_ADDR_SPACE_SIZE instead."
21# endif
22#elif defined(ADDR_SPACE_SIZE)
23# ifndef PLAT_PHY_ADDR_SPACE_SIZE
24# define PLAT_PHY_ADDR_SPACE_SIZE ADDR_SPACE_SIZE
25# endif
26# ifndef PLAT_VIRT_ADDR_SPACE_SIZE
27# define PLAT_VIRT_ADDR_SPACE_SIZE ADDR_SPACE_SIZE
28# endif
29#endif
30
31/* The virtual and physical address space sizes must be powers of two. */
32CASSERT(IS_POWER_OF_TWO(PLAT_VIRT_ADDR_SPACE_SIZE),
33 assert_valid_virt_addr_space_size);
34CASSERT(IS_POWER_OF_TWO(PLAT_PHY_ADDR_SPACE_SIZE),
35 assert_valid_phy_addr_space_size);
Antonio Nino Diazd48ae612016-08-02 09:21:41 +010036
Antonio Nino Diaz010888d2016-12-13 15:02:31 +000037/*
38 * In AArch32 state, the MMU only supports 4KB page granularity, which means
39 * that the first translation table level is either 1 or 2. Both of them are
40 * allowed to have block and table descriptors. See section G4.5.6 of the
41 * ARMv8-A Architecture Reference Manual (DDI 0487A.k) for more information.
42 *
43 * In AArch64 state, the MMU may support 4 KB, 16 KB and 64 KB page
44 * granularity. For 4KB granularity, a level 0 table descriptor doesn't support
45 * block translation. For 16KB, the same thing happens to levels 0 and 1. For
46 * 64KB, same for level 1. See section D4.3.1 of the ARMv8-A Architecture
47 * Reference Manual (DDI 0487A.k) for more information.
48 *
49 * The define below specifies the first table level that allows block
50 * descriptors.
51 */
52
53#ifdef AARCH32
54
55# define XLAT_BLOCK_LEVEL_MIN 1
56
57#else /* if AArch64 */
58
59# if PAGE_SIZE == (4*1024) /* 4KB */
60# define XLAT_BLOCK_LEVEL_MIN 1
61# else /* 16KB or 64KB */
62# define XLAT_BLOCK_LEVEL_MIN 2
63# endif
64
65#endif /* AARCH32 */
66
Soby Mathew44170c42016-03-22 15:51:08 +000067void print_mmap(void);
Antonio Nino Diazefabaa92017-04-27 13:30:22 +010068
69/* Returns the current Exception Level. The returned EL must be 1 or higher. */
70int xlat_arch_current_el(void);
71
72/*
73 * Returns the bit mask that has to be ORed to the rest of a translation table
74 * descriptor so that execution of code is prohibited at the given Exception
75 * Level.
76 */
77uint64_t xlat_arch_get_xn_desc(int el);
78
Soby Mathew44170c42016-03-22 15:51:08 +000079void init_xlation_table(uintptr_t base_va, uint64_t *table,
80 int level, uintptr_t *max_va,
81 unsigned long long *max_pa);
82
83#endif /* __XLAT_TABLES_PRIVATE_H__ */