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Antonio Nino Diazae6779e2017-11-06 14:49:04 +00001/*
Antonio Nino Diaz6942f052018-07-14 02:15:51 +01002 * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
Antonio Nino Diazae6779e2017-11-06 14:49:04 +00003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <arch_helpers.h>
8#include <assert.h>
9#include <console.h>
10#include <debug.h>
11#include <mmio.h>
12#include <platform_def.h>
13#include <platform.h>
14#include <psci.h>
15
16#include "rpi3_hw.h"
17
Antonio Nino Diazae6779e2017-11-06 14:49:04 +000018/* Make composite power state parameter till power level 0 */
19#if PSCI_EXTENDED_STATE_ID
20
21#define rpi3_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \
22 (((lvl0_state) << PSTATE_ID_SHIFT) | \
23 ((type) << PSTATE_TYPE_SHIFT))
24
25#else
26
27#define rpi3_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \
28 (((lvl0_state) << PSTATE_ID_SHIFT) | \
29 ((pwr_lvl) << PSTATE_PWR_LVL_SHIFT) | \
30 ((type) << PSTATE_TYPE_SHIFT))
31
32#endif /* PSCI_EXTENDED_STATE_ID */
33
34#define rpi3_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type) \
35 (((lvl1_state) << PLAT_LOCAL_PSTATE_WIDTH) | \
36 rpi3_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type))
37
38/*
39 * The table storing the valid idle power states. Ensure that the
40 * array entries are populated in ascending order of state-id to
41 * enable us to use binary search during power state validation.
42 * The table must be terminated by a NULL entry.
43 */
44static const unsigned int rpi3_pm_idle_states[] = {
45 /* State-id - 0x01 */
46 rpi3_make_pwrstate_lvl1(PLAT_LOCAL_STATE_RUN, PLAT_LOCAL_STATE_RET,
47 MPIDR_AFFLVL0, PSTATE_TYPE_STANDBY),
48 /* State-id - 0x02 */
49 rpi3_make_pwrstate_lvl1(PLAT_LOCAL_STATE_RUN, PLAT_LOCAL_STATE_OFF,
50 MPIDR_AFFLVL0, PSTATE_TYPE_POWERDOWN),
51 /* State-id - 0x22 */
52 rpi3_make_pwrstate_lvl1(PLAT_LOCAL_STATE_OFF, PLAT_LOCAL_STATE_OFF,
53 MPIDR_AFFLVL1, PSTATE_TYPE_POWERDOWN),
54 0,
55};
56
57/*******************************************************************************
58 * Platform handler called to check the validity of the power state
59 * parameter. The power state parameter has to be a composite power state.
60 ******************************************************************************/
61static int rpi3_validate_power_state(unsigned int power_state,
62 psci_power_state_t *req_state)
63{
64 unsigned int state_id;
65 int i;
66
67 assert(req_state != 0);
68
69 /*
70 * Currently we are using a linear search for finding the matching
71 * entry in the idle power state array. This can be made a binary
72 * search if the number of entries justify the additional complexity.
73 */
74 for (i = 0; rpi3_pm_idle_states[i] != 0; i++) {
75 if (power_state == rpi3_pm_idle_states[i]) {
76 break;
77 }
78 }
79
80 /* Return error if entry not found in the idle state array */
81 if (!rpi3_pm_idle_states[i]) {
82 return PSCI_E_INVALID_PARAMS;
83 }
84
85 i = 0;
86 state_id = psci_get_pstate_id(power_state);
87
88 /* Parse the State ID and populate the state info parameter */
89 while (state_id) {
90 req_state->pwr_domain_state[i++] = state_id &
91 PLAT_LOCAL_PSTATE_MASK;
92 state_id >>= PLAT_LOCAL_PSTATE_WIDTH;
93 }
94
95 return PSCI_E_SUCCESS;
96}
97
98/*******************************************************************************
99 * Platform handler called when a CPU is about to enter standby.
100 ******************************************************************************/
101static void rpi3_cpu_standby(plat_local_state_t cpu_state)
102{
103 assert(cpu_state == PLAT_LOCAL_STATE_RET);
104
105 /*
106 * Enter standby state.
107 * dsb is good practice before using wfi to enter low power states
108 */
109 dsb();
110 wfi();
111}
112
113/*******************************************************************************
114 * Platform handler called when a power domain is about to be turned on. The
115 * mpidr determines the CPU to be turned on.
116 ******************************************************************************/
117static int rpi3_pwr_domain_on(u_register_t mpidr)
118{
119 int rc = PSCI_E_SUCCESS;
120 unsigned int pos = plat_core_pos_by_mpidr(mpidr);
121 uint64_t *hold_base = (uint64_t *)PLAT_RPI3_TM_HOLD_BASE;
122
123 assert(pos < PLATFORM_CORE_COUNT);
124
125 hold_base[pos] = PLAT_RPI3_TM_HOLD_STATE_GO;
126
127 /* Make sure that the write has completed */
128 dsb();
129 isb();
130
131 sev();
132
133 return rc;
134}
135
136/*******************************************************************************
137 * Platform handler called when a power domain has just been powered on after
138 * being turned off earlier. The target_state encodes the low power state that
139 * each level has woken up from.
140 ******************************************************************************/
141void rpi3_pwr_domain_on_finish(const psci_power_state_t *target_state)
142{
143 assert(target_state->pwr_domain_state[MPIDR_AFFLVL0] ==
144 PLAT_LOCAL_STATE_OFF);
145}
146
147/*******************************************************************************
Antonio Nino Diaz6942f052018-07-14 02:15:51 +0100148 * Platform handlers for system reset and system off.
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000149 ******************************************************************************/
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000150
Antonio Nino Diaz6942f052018-07-14 02:15:51 +0100151/* 10 ticks (Watchdog timer = Timer clock / 16) */
152#define RESET_TIMEOUT U(10)
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000153
Antonio Nino Diaz6942f052018-07-14 02:15:51 +0100154static void __dead2 rpi3_watchdog_reset(void)
155{
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000156 uint32_t rstc;
157
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000158 console_flush();
159
Antonio Nino Diaz6942f052018-07-14 02:15:51 +0100160 dsbsy();
161 isb();
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000162
Antonio Nino Diaz6942f052018-07-14 02:15:51 +0100163 mmio_write_32(RPI3_PM_BASE + RPI3_PM_WDOG_OFFSET,
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000164 RPI3_PM_PASSWORD | RESET_TIMEOUT);
Antonio Nino Diaz6942f052018-07-14 02:15:51 +0100165
166 rstc = mmio_read_32(RPI3_PM_BASE + RPI3_PM_RSTC_OFFSET);
167 rstc &= ~RPI3_PM_RSTC_WRCFG_MASK;
168 rstc |= RPI3_PM_PASSWORD | RPI3_PM_RSTC_WRCFG_FULL_RESET;
169 mmio_write_32(RPI3_PM_BASE + RPI3_PM_RSTC_OFFSET, rstc);
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000170
171 for (;;) {
172 wfi();
173 }
174}
175
Antonio Nino Diaz6942f052018-07-14 02:15:51 +0100176static void __dead2 rpi3_system_reset(void)
177{
178 INFO("rpi3: PSCI_SYSTEM_RESET: Invoking watchdog reset\n");
179
180 rpi3_watchdog_reset();
181}
182
183static void __dead2 rpi3_system_off(void)
184{
185 uint32_t rsts;
186
187 INFO("rpi3: PSCI_SYSTEM_OFF: Invoking watchdog reset\n");
188
189 /*
190 * This function doesn't actually make the Raspberry Pi turn itself off,
191 * the hardware doesn't allow it. It simply reboots it and the RSTS
192 * value tells the bootcode.bin firmware not to continue the regular
193 * bootflow and to stay in a low power mode.
194 */
195
196 rsts = mmio_read_32(RPI3_PM_BASE + RPI3_PM_RSTS_OFFSET);
197 rsts |= RPI3_PM_PASSWORD | RPI3_PM_RSTS_WRCFG_HALT;
198 mmio_write_32(RPI3_PM_BASE + RPI3_PM_RSTS_OFFSET, rsts);
199
200 rpi3_watchdog_reset();
201}
202
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000203/*******************************************************************************
204 * Platform handlers and setup function.
205 ******************************************************************************/
206static const plat_psci_ops_t plat_rpi3_psci_pm_ops = {
207 .cpu_standby = rpi3_cpu_standby,
208 .pwr_domain_on = rpi3_pwr_domain_on,
209 .pwr_domain_on_finish = rpi3_pwr_domain_on_finish,
Antonio Nino Diaz6942f052018-07-14 02:15:51 +0100210 .system_off = rpi3_system_off,
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000211 .system_reset = rpi3_system_reset,
212 .validate_power_state = rpi3_validate_power_state,
213};
214
215int plat_setup_psci_ops(uintptr_t sec_entrypoint,
216 const plat_psci_ops_t **psci_ops)
217{
Antonio Nino Diazbc297332018-07-14 01:22:43 +0100218 uintptr_t *entrypoint = (void *) PLAT_RPI3_TM_ENTRYPOINT;
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000219
Antonio Nino Diazbc297332018-07-14 01:22:43 +0100220 *entrypoint = sec_entrypoint;
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000221 *psci_ops = &plat_rpi3_psci_pm_ops;
222
223 return 0;
224}