Haojian Zhuang | 602362d | 2017-06-01 12:15:14 +0800 | [diff] [blame] | 1 | # |
Masahiro Yamada | 4d15680 | 2018-01-26 11:42:01 +0900 | [diff] [blame] | 2 | # Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. |
Haojian Zhuang | 602362d | 2017-06-01 12:15:14 +0800 | [diff] [blame] | 3 | # |
| 4 | # SPDX-License-Identifier: BSD-3-Clause |
| 5 | # |
| 6 | |
Victor Chong | 2d9a42d | 2017-08-17 15:21:10 +0900 | [diff] [blame] | 7 | # Enable version2 of image loading |
| 8 | LOAD_IMAGE_V2 := 1 |
| 9 | |
Victor Chong | 9128768 | 2017-05-28 00:14:37 +0900 | [diff] [blame] | 10 | # On Hikey960, the TSP can execute from TZC secure area in DRAM. |
| 11 | HIKEY960_TSP_RAM_LOCATION := dram |
| 12 | ifeq (${HIKEY960_TSP_RAM_LOCATION}, dram) |
| 13 | HIKEY960_TSP_RAM_LOCATION_ID = HIKEY960_DRAM_ID |
| 14 | else ifeq (${HIKEY960_TSP_RAM_LOCATION}, sram) |
| 15 | HIKEY960_TSP_RAM_LOCATION_ID := HIKEY960_SRAM_ID |
| 16 | else |
| 17 | $(error "Currently unsupported HIKEY960_TSP_RAM_LOCATION value") |
| 18 | endif |
| 19 | |
Haojian Zhuang | 602362d | 2017-06-01 12:15:14 +0800 | [diff] [blame] | 20 | CRASH_CONSOLE_BASE := PL011_UART6_BASE |
| 21 | COLD_BOOT_SINGLE_CPU := 1 |
| 22 | PROGRAMMABLE_RESET_ADDRESS := 1 |
David Cunado | c5b0c0f | 2017-10-31 23:19:21 +0000 | [diff] [blame] | 23 | ENABLE_SVE_FOR_NS := 0 |
Haojian Zhuang | 602362d | 2017-06-01 12:15:14 +0800 | [diff] [blame] | 24 | |
| 25 | # Process flags |
Victor Chong | 9128768 | 2017-05-28 00:14:37 +0900 | [diff] [blame] | 26 | $(eval $(call add_define,HIKEY960_TSP_RAM_LOCATION_ID)) |
Haojian Zhuang | 602362d | 2017-06-01 12:15:14 +0800 | [diff] [blame] | 27 | $(eval $(call add_define,CRASH_CONSOLE_BASE)) |
| 28 | |
Victor Chong | 7d787f5 | 2017-08-16 13:53:56 +0900 | [diff] [blame] | 29 | # Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images |
| 30 | # in the FIP if the platform requires. |
| 31 | ifneq ($(BL32_EXTRA1),) |
Masahiro Yamada | 9c5ca52 | 2018-01-26 11:42:01 +0900 | [diff] [blame] | 32 | $(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1)) |
Victor Chong | 7d787f5 | 2017-08-16 13:53:56 +0900 | [diff] [blame] | 33 | endif |
| 34 | ifneq ($(BL32_EXTRA2),) |
Masahiro Yamada | 9c5ca52 | 2018-01-26 11:42:01 +0900 | [diff] [blame] | 35 | $(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2)) |
Victor Chong | 7d787f5 | 2017-08-16 13:53:56 +0900 | [diff] [blame] | 36 | endif |
| 37 | |
Haojian Zhuang | 602362d | 2017-06-01 12:15:14 +0800 | [diff] [blame] | 38 | ENABLE_PLAT_COMPAT := 0 |
| 39 | |
| 40 | USE_COHERENT_MEM := 1 |
| 41 | |
| 42 | PLAT_INCLUDES := -Iinclude/common/tbbr \ |
| 43 | -Iplat/hisilicon/hikey960/include |
| 44 | |
| 45 | PLAT_BL_COMMON_SOURCES := drivers/arm/pl011/pl011_console.S \ |
| 46 | drivers/delay_timer/delay_timer.c \ |
| 47 | drivers/delay_timer/generic_delay_timer.c \ |
| 48 | lib/aarch64/xlat_tables.c \ |
| 49 | plat/hisilicon/hikey960/aarch64/hikey960_common.c \ |
| 50 | plat/hisilicon/hikey960/hikey960_boardid.c |
| 51 | |
| 52 | HIKEY960_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \ |
| 53 | drivers/arm/gic/v2/gicv2_main.c \ |
| 54 | drivers/arm/gic/v2/gicv2_helpers.c \ |
| 55 | plat/common/plat_gicv2.c |
| 56 | |
| 57 | BL1_SOURCES += bl1/tbbr/tbbr_img_desc.c \ |
| 58 | drivers/io/io_block.c \ |
| 59 | drivers/io/io_fip.c \ |
| 60 | drivers/io/io_storage.c \ |
| 61 | drivers/synopsys/ufs/dw_ufs.c \ |
| 62 | drivers/ufs/ufs.c \ |
| 63 | lib/cpus/aarch64/cortex_a53.S \ |
| 64 | plat/hisilicon/hikey960/aarch64/hikey960_helpers.S \ |
| 65 | plat/hisilicon/hikey960/hikey960_bl1_setup.c \ |
| 66 | plat/hisilicon/hikey960/hikey960_io_storage.c \ |
| 67 | ${HIKEY960_GIC_SOURCES} |
Haojian Zhuang | 1f73c0c | 2017-06-01 14:03:22 +0800 | [diff] [blame] | 68 | |
| 69 | BL2_SOURCES += drivers/io/io_block.c \ |
| 70 | drivers/io/io_fip.c \ |
| 71 | drivers/io/io_storage.c \ |
| 72 | drivers/ufs/ufs.c \ |
| 73 | plat/hisilicon/hikey960/hikey960_bl2_setup.c \ |
| 74 | plat/hisilicon/hikey960/hikey960_io_storage.c \ |
| 75 | plat/hisilicon/hikey960/hikey960_mcu_load.c |
Haojian Zhuang | 1b5c225 | 2017-06-01 15:20:46 +0800 | [diff] [blame] | 76 | |
Victor Chong | 2d9a42d | 2017-08-17 15:21:10 +0900 | [diff] [blame] | 77 | ifeq (${LOAD_IMAGE_V2},1) |
| 78 | BL2_SOURCES += plat/hisilicon/hikey960/hikey960_bl2_mem_params_desc.c \ |
| 79 | plat/hisilicon/hikey960/hikey960_image_load.c \ |
| 80 | common/desc_image_load.c |
Victor Chong | 7d787f5 | 2017-08-16 13:53:56 +0900 | [diff] [blame] | 81 | |
| 82 | ifeq (${SPD},opteed) |
| 83 | BL2_SOURCES += lib/optee/optee_utils.c |
| 84 | endif |
Victor Chong | 2d9a42d | 2017-08-17 15:21:10 +0900 | [diff] [blame] | 85 | endif |
| 86 | |
Haojian Zhuang | 1b5c225 | 2017-06-01 15:20:46 +0800 | [diff] [blame] | 87 | BL31_SOURCES += drivers/arm/cci/cci.c \ |
| 88 | lib/cpus/aarch64/cortex_a53.S \ |
| 89 | lib/cpus/aarch64/cortex_a72.S \ |
| 90 | lib/cpus/aarch64/cortex_a73.S \ |
| 91 | plat/common/aarch64/plat_psci_common.c \ |
| 92 | plat/hisilicon/hikey960/aarch64/hikey960_helpers.S \ |
| 93 | plat/hisilicon/hikey960/hikey960_bl31_setup.c \ |
| 94 | plat/hisilicon/hikey960/hikey960_pm.c \ |
| 95 | plat/hisilicon/hikey960/hikey960_topology.c \ |
| 96 | plat/hisilicon/hikey960/drivers/pwrc/hisi_pwrc.c \ |
| 97 | plat/hisilicon/hikey960/drivers/ipc/hisi_ipc.c \ |
| 98 | ${HIKEY960_GIC_SOURCES} |
Victor Chong | cb27a35 | 2017-07-12 01:07:29 +0900 | [diff] [blame] | 99 | |
| 100 | # Enable workarounds for selected Cortex-A53 errata. |
| 101 | ERRATA_A53_836870 := 1 |
| 102 | ERRATA_A53_843419 := 1 |
| 103 | ERRATA_A53_855873 := 1 |
Leo Yan | 453940d | 2017-11-22 17:10:39 +0800 | [diff] [blame] | 104 | |
| 105 | FIP_ALIGN := 512 |