| Benjamin Fair | f807a34 | 2016-10-18 14:32:06 -0500 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <arch.h> |
| 8 | #include <asm_macros.S> |
| 9 | #include <platform_def.h> |
| 10 | |
| 11 | #define K3_BOOT_REASON_COLD_RESET 0x1 |
| 12 | |
| 13 | /* ------------------------------------------------------------------ |
| 14 | * uintptr_t plat_get_my_entrypoint(void) |
| 15 | * ------------------------------------------------------------------ |
| 16 | * |
| 17 | * This function is called with the called with the MMU and caches |
| 18 | * disabled (SCTLR_EL3.M = 0 and SCTLR_EL3.C = 0). The function is |
| 19 | * responsible for distinguishing between a warm and cold reset for the |
| 20 | * current CPU using platform-specific means. If it's a warm reset, |
| 21 | * then it returns the warm reset entrypoint point provided to |
| 22 | * plat_setup_psci_ops() during BL31 initialization. If it's a cold |
| 23 | * reset then this function must return zero. |
| 24 | * |
| 25 | * This function does not follow the Procedure Call Standard used by |
| 26 | * the Application Binary Interface for the ARM 64-bit architecture. |
| 27 | * The caller should not assume that callee saved registers are |
| 28 | * preserved across a call to this function. |
| 29 | */ |
| 30 | .globl plat_get_my_entrypoint |
| 31 | func plat_get_my_entrypoint |
| 32 | ldr x0, k3_boot_reason_data_store |
| 33 | cmp x0, #K3_BOOT_REASON_COLD_RESET |
| 34 | |
| 35 | /* We ONLY support cold boot at this point */ |
| 36 | bne plat_unsupported_boot |
| 37 | mov x0, #0 |
| 38 | ret |
| 39 | |
| 40 | /* |
| 41 | * We self manage our boot reason. |
| 42 | * At load time, we have just a default reason - which is cold reset |
| 43 | */ |
| 44 | k3_boot_reason_data_store: |
| 45 | .word K3_BOOT_REASON_COLD_RESET |
| 46 | |
| 47 | plat_unsupported_boot: |
| 48 | b plat_unsupported_boot |
| 49 | |
| 50 | endfunc plat_get_my_entrypoint |
| 51 | |
| 52 | /* ------------------------------------------------------------------ |
| 53 | * unsigned int plat_my_core_pos(void) |
| 54 | * ------------------------------------------------------------------ |
| 55 | * |
| 56 | * This function returns the index of the calling CPU which is used as a |
| 57 | * CPU-specific linear index into blocks of memory (for example while |
| 58 | * allocating per-CPU stacks). This function will be invoked very early |
| 59 | * in the initialization sequence which mandates that this function |
| 60 | * should be implemented in assembly and should not rely on the |
| 61 | * avalability of a C runtime environment. This function can clobber x0 |
| 62 | * - x8 and must preserve x9 - x29. |
| 63 | * |
| 64 | * This function plays a crucial role in the power domain topology |
| 65 | * framework in PSCI and details of this can be found in Power Domain |
| 66 | * Topology Design. |
| 67 | */ |
| 68 | .globl plat_my_core_pos |
| 69 | func plat_my_core_pos |
| 70 | mrs x0, MPIDR_EL1 |
| 71 | |
| 72 | and x1, x0, #MPIDR_CLUSTER_MASK |
| 73 | lsr x1, x1, #MPIDR_AFF1_SHIFT |
| 74 | and x0, x0, #MPIDR_CPU_MASK |
| 75 | |
| 76 | #if K3_CLUSTER1_MSMC_PORT != UNUSED |
| 77 | cmp x1, #K3_CLUSTER0_MSMC_PORT |
| 78 | b.eq out |
| 79 | add x0, x0, #K3_CLUSTER0_CORE_COUNT |
| 80 | #if K3_CLUSTER2_MSMC_PORT != UNUSED |
| 81 | cmp x1, #K3_CLUSTER1_MSMC_PORT |
| 82 | b.eq out |
| 83 | add x0, x0, #K3_CLUSTER1_CORE_COUNT |
| 84 | #if K3_CLUSTER3_MSMC_PORT != UNUSED |
| 85 | cmp x1, #K3_CLUSTER2_MSMC_PORT |
| 86 | b.eq out |
| 87 | add x0, x0, #K3_CLUSTER2_CORE_COUNT |
| 88 | #endif /* K3_CLUSTER3_MSMC_PORT != UNUSED */ |
| 89 | #endif /* K3_CLUSTER2_MSMC_PORT != UNUSED */ |
| 90 | #endif /* K3_CLUSTER1_MSMC_PORT != UNUSED */ |
| 91 | |
| 92 | out: |
| 93 | ret |
| 94 | endfunc plat_my_core_pos |