blob: 709379ee2d2a472afdd70350963289b9b0e43dd6 [file] [log] [blame]
Chungying Lua566cc92023-03-15 14:16:28 +08001/*
developer2b9bda02024-11-15 11:01:03 +08002 * Copyright (c) 2023-2024, MediaTek Inc. All rights reserved.
Chungying Lua566cc92023-03-15 14:16:28 +08003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef APUSYS_H
8#define APUSYS_H
9
10#define MODULE_TAG "[APUSYS]"
11
Chungying Luf1f14b32023-03-15 15:31:56 +080012enum MTK_APUSYS_KERNEL_OP {
developerf7dfb992024-11-14 20:21:31 +080013 MTK_APUSYS_KERNEL_OP_APUSYS_PWR_TOP_ON, /* 0 */
14 MTK_APUSYS_KERNEL_OP_APUSYS_PWR_TOP_OFF, /* 1 */
15 MTK_APUSYS_KERNEL_OP_APUSYS_RV_SETUP_REVISER, /* 2 */
16 MTK_APUSYS_KERNEL_OP_APUSYS_RV_RESET_MP, /* 3 */
17 MTK_APUSYS_KERNEL_OP_APUSYS_RV_SETUP_BOOT, /* 4 */
18 MTK_APUSYS_KERNEL_OP_APUSYS_RV_START_MP, /* 5 */
19 MTK_APUSYS_KERNEL_OP_APUSYS_RV_STOP_MP, /* 6 */
20 MTK_APUSYS_KERNEL_OP_DEVAPC_INIT_RCX, /* 7 */
21 MTK_APUSYS_KERNEL_OP_APUSYS_RV_SETUP_SEC_MEM, /* 8 */
22 MTK_APUSYS_KERNEL_OP_APUSYS_RV_DISABLE_WDT_ISR, /* 9 */
23 MTK_APUSYS_KERNEL_OP_APUSYS_RV_CLEAR_WDT_ISR, /* 10 */
24 MTK_APUSYS_KERNEL_OP_APUSYS_RV_CG_GATING, /* 11 */
25 MTK_APUSYS_KERNEL_OP_APUSYS_RV_CG_UNGATING, /* 12 */
26 MTK_APUSYS_KERNEL_OP_APUSYS_RV_SETUP_APUMMU, /* 13 */
27 MTK_APUSYS_KERNEL_OP_APUSYS_LOGTOP_REG_DUMP, /* 14 */
28 MTK_APUSYS_KERNEL_OP_APUSYS_LOGTOP_REG_WRITE, /* 15 */
29 MTK_APUSYS_KERNEL_OP_APUSYS_LOGTOP_REG_W1C, /* 16 */
30 MTK_APUSYS_KERNEL_OP_APUSYS_COLD_BOOT_CLR_MBOX_DUMMY, /* 17 */
31 MTK_APUSYS_KERNEL_OP_APUSYS_SETUP_CE_BIN, /* 18 */
Chungying Luf1f14b32023-03-15 15:31:56 +080032 MTK_APUSYS_KERNEL_OP_NUM,
33};
34
Chungying Lua566cc92023-03-15 14:16:28 +080035#endif