| Tony Xie | f6118cc | 2016-01-15 17:17:32 +0800 | [diff] [blame^] | 1 | /* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. |
| 2 | * |
| 3 | * Redistribution and use in source and binary forms, with or without |
| 4 | * modification, are permitted provided that the following conditions are met: |
| 5 | * |
| 6 | * Redistributions of source code must retain the above copyright notice, this |
| 7 | * list of conditions and the following disclaimer. |
| 8 | * |
| 9 | * Redistributions in binary form must reproduce the above copyright notice, |
| 10 | * this list of conditions and the following disclaimer in the documentation |
| 11 | * and/or other materials provided with the distribution. |
| 12 | * |
| 13 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 14 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 15 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 16 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 17 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 18 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 19 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 20 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 21 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 22 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 23 | * POSSIBILITY OF SUCH DAMAGE. |
| 24 | */ |
| 25 | |
| 26 | #ifndef __PMU_SRAM_H__ |
| 27 | #define __PMU_SRAM_H__ |
| 28 | |
| 29 | /***************************************************************************** |
| 30 | * cpu up status |
| 31 | *****************************************************************************/ |
| 32 | #define PMU_SYS_SLP_MODE 0xa5 |
| 33 | #define PMU_SYS_ON_MODE 0x0 |
| 34 | |
| 35 | /***************************************************************************** |
| 36 | * define data offset in struct psram_data |
| 37 | *****************************************************************************/ |
| 38 | #define PSRAM_DT_SP 0x0 |
| 39 | #define PSRAM_DT_DDR_FUNC 0x8 |
| 40 | #define PSRAM_DT_DDR_DATA 0x10 |
| 41 | #define PSRAM_DT_DDRFLAG 0x18 |
| 42 | #define PSRAM_DT_SYS_MODE 0x1c |
| 43 | #define PSRAM_DT_MPIDR 0x20 |
| 44 | #define PSRAM_DT_END 0x24 |
| 45 | /****************************************************************************** |
| 46 | * Allocate data region for struct psram_data_t in pmusram |
| 47 | ******************************************************************************/ |
| 48 | /* Needed aligned 16 bytes for sp stack top */ |
| 49 | #define PSRAM_DT_SIZE (((PSRAM_DT_END + 16) / 16) * 16) |
| 50 | #define PSRAM_DT_BASE ((PMUSRAM_BASE + PMUSRAM_RSIZE) - PSRAM_DT_SIZE) |
| 51 | #define PSRAM_SP_TOP PSRAM_DT_BASE |
| 52 | |
| 53 | #ifndef __ASSEMBLY__ |
| 54 | |
| 55 | /* |
| 56 | * The struct is used in pmu_cpus_on.S which |
| 57 | * gets the data of the struct by the following index |
| 58 | * #define PSRAM_DT_SP 0x0 |
| 59 | * #define PSRAM_DT_DDR_FUNC 0x8 |
| 60 | * #define PSRAM_DT_DDR_DATA 0x10 |
| 61 | * #define PSRAM_DT_DDRFLAG 0x18 |
| 62 | * #define PSRAM_DT_SYS_MODE 0x1c |
| 63 | * #define PSRAM_DT_MPIDR 0x20 |
| 64 | */ |
| 65 | struct psram_data_t { |
| 66 | uint64_t sp; |
| 67 | uint64_t ddr_func; |
| 68 | uint64_t ddr_data; |
| 69 | uint32_t ddr_flag; |
| 70 | uint32_t sys_mode; |
| 71 | uint32_t boot_mpidr; |
| 72 | }; |
| 73 | |
| 74 | CASSERT(sizeof(struct psram_data_t) <= PSRAM_DT_SIZE, |
| 75 | assert_psram_dt_size_mismatch); |
| 76 | CASSERT(__builtin_offsetof(struct psram_data_t, sp) == PSRAM_DT_SP, |
| 77 | assert_psram_dt_sp_offset_mistmatch); |
| 78 | CASSERT(__builtin_offsetof(struct psram_data_t, ddr_func) == PSRAM_DT_DDR_FUNC, |
| 79 | assert_psram_dt_ddr_func_offset_mistmatch); |
| 80 | CASSERT(__builtin_offsetof(struct psram_data_t, ddr_data) == PSRAM_DT_DDR_DATA, |
| 81 | assert_psram_dt_ddr_data_offset_mistmatch); |
| 82 | CASSERT(__builtin_offsetof(struct psram_data_t, ddr_flag) == PSRAM_DT_DDRFLAG, |
| 83 | assert_psram_dt_ddr_flag_offset_mistmatch); |
| 84 | CASSERT(__builtin_offsetof(struct psram_data_t, sys_mode) == PSRAM_DT_SYS_MODE, |
| 85 | assert_psram_dt_sys_mode_offset_mistmatch); |
| 86 | CASSERT(__builtin_offsetof(struct psram_data_t, boot_mpidr) == PSRAM_DT_MPIDR, |
| 87 | assert_psram_dt_mpidr_offset_mistmatch); |
| 88 | void u32_align_cpy(uint32_t *dst, const uint32_t *src, size_t bytes); |
| 89 | #endif /* __ASSEMBLY__ */ |
| 90 | |
| 91 | #endif |