blob: 715ea6c0b736da5bd09c1800489fb90cd07fef57 [file] [log] [blame]
Harry Liebelafd1ec72014-04-01 19:19:22 +01001/*
2 * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#include <assert.h>
Dan Handley714a0d22014-04-09 13:13:04 +010032#include <debug.h>
Dan Handley2bd4ef22014-04-09 13:14:54 +010033#include <mmio.h>
34#include <stddef.h>
35#include <tzc400.h>
Harry Liebelafd1ec72014-04-01 19:19:22 +010036
37static uint32_t tzc_read_build_config(uint64_t base)
38{
39 return mmio_read_32(base + BUILD_CONFIG_OFF);
40}
41
42static uint32_t tzc_read_gate_keeper(uint64_t base)
43{
44 return mmio_read_32(base + GATE_KEEPER_OFF);
45}
46
47static void tzc_write_gate_keeper(uint64_t base, uint32_t val)
48{
49 mmio_write_32(base + GATE_KEEPER_OFF, val);
50}
51
Dan Handleye2712bc2014-04-10 15:37:22 +010052static void tzc_write_action(uint64_t base, tzc_action_t action)
Harry Liebelafd1ec72014-04-01 19:19:22 +010053{
54 mmio_write_32(base + ACTION_OFF, action);
55}
56
57static void tzc_write_region_base_low(uint64_t base, uint32_t region, uint32_t val)
58{
59 mmio_write_32(base + REGION_BASE_LOW_OFF + REGION_NUM_OFF(region), val);
60}
61
62static void tzc_write_region_base_high(uint64_t base, uint32_t region, uint32_t val)
63{
64 mmio_write_32(base + REGION_BASE_HIGH_OFF + REGION_NUM_OFF(region), val);
65}
66
67static void tzc_write_region_top_low(uint64_t base, uint32_t region, uint32_t val)
68{
69 mmio_write_32(base + REGION_TOP_LOW_OFF + REGION_NUM_OFF(region), val);
70}
71
72static void tzc_write_region_top_high(uint64_t base, uint32_t region, uint32_t val)
73{
74 mmio_write_32(base + REGION_TOP_HIGH_OFF + REGION_NUM_OFF(region), val);
75}
76
77static void tzc_write_region_attributes(uint64_t base, uint32_t region, uint32_t val)
78{
79 mmio_write_32(base + REGION_ATTRIBUTES_OFF + REGION_NUM_OFF(region), val);
80}
81
82static void tzc_write_region_id_access(uint64_t base, uint32_t region, uint32_t val)
83{
84 mmio_write_32(base + REGION_ID_ACCESS_OFF + REGION_NUM_OFF(region), val);
85}
86
87static uint32_t tzc_read_component_id(uint64_t base)
88{
89 uint32_t id;
90
91 id = mmio_read_8(base + CID0_OFF);
92 id |= (mmio_read_8(base + CID1_OFF) << 8);
93 id |= (mmio_read_8(base + CID2_OFF) << 16);
94 id |= (mmio_read_8(base + CID3_OFF) << 24);
95
96 return id;
97}
98
99static uint32_t tzc_get_gate_keeper(uint64_t base, uint8_t filter)
100{
101 uint32_t tmp;
102
103 tmp = (tzc_read_gate_keeper(base) >> GATE_KEEPER_OS_SHIFT) &
104 GATE_KEEPER_OS_MASK;
105
Juan Castillof558cac2014-06-05 09:45:36 +0100106 return (tmp >> filter) & GATE_KEEPER_FILTER_MASK;
Harry Liebelafd1ec72014-04-01 19:19:22 +0100107}
108
109/* This function is not MP safe. */
110static void tzc_set_gate_keeper(uint64_t base, uint8_t filter, uint32_t val)
111{
112 uint32_t tmp;
113
114 /* Upper half is current state. Lower half is requested state. */
115 tmp = (tzc_read_gate_keeper(base) >> GATE_KEEPER_OS_SHIFT) &
116 GATE_KEEPER_OS_MASK;
117
118 if (val)
119 tmp |= (1 << filter);
120 else
121 tmp &= ~(1 << filter);
122
123 tzc_write_gate_keeper(base, (tmp & GATE_KEEPER_OR_MASK) <<
124 GATE_KEEPER_OR_SHIFT);
125
126 /* Wait here until we see the change reflected in the TZC status. */
127 while (((tzc_read_gate_keeper(base) >> GATE_KEEPER_OS_SHIFT) &
128 GATE_KEEPER_OS_MASK) != tmp)
129 ;
130}
131
132
Dan Handleye2712bc2014-04-10 15:37:22 +0100133void tzc_init(tzc_instance_t *controller)
Harry Liebelafd1ec72014-04-01 19:19:22 +0100134{
135 uint32_t tzc_id, tzc_build;
136
137 assert(controller != NULL);
138
139 /*
140 * We expect to see a tzc400. Check component ID. The TZC-400 TRM shows
141 * component ID is expected to be "0xB105F00D".
142 */
143 tzc_id = tzc_read_component_id(controller->base);
144 if (tzc_id != TZC400_COMPONENT_ID) {
145 ERROR("TZC : Wrong device ID (0x%x).\n", tzc_id);
146 panic();
147 }
148
149 /* Save values we will use later. */
150 tzc_build = tzc_read_build_config(controller->base);
151 controller->num_filters = ((tzc_build >> BUILD_CONFIG_NF_SHIFT) &
152 BUILD_CONFIG_NF_MASK) + 1;
153 controller->addr_width = ((tzc_build >> BUILD_CONFIG_AW_SHIFT) &
154 BUILD_CONFIG_AW_MASK) + 1;
155 controller->num_regions = ((tzc_build >> BUILD_CONFIG_NR_SHIFT) &
156 BUILD_CONFIG_NR_MASK) + 1;
157}
158
159
160/*
161 * `tzc_configure_region` is used to program regions into the TrustZone
162 * controller. A region can be associated with more than one filter. The
163 * associated filters are passed in as a bitmap (bit0 = filter0).
164 * NOTE:
165 * The region 0 covers the whole address space and is enabled on all filters,
166 * this cannot be changed. It is, however, possible to change some region 0
167 * permissions.
168 */
Dan Handleye2712bc2014-04-10 15:37:22 +0100169void tzc_configure_region(const tzc_instance_t *controller,
Harry Liebelafd1ec72014-04-01 19:19:22 +0100170 uint32_t filters,
171 uint8_t region,
172 uint64_t region_base,
173 uint64_t region_top,
Dan Handleye2712bc2014-04-10 15:37:22 +0100174 tzc_region_attributes_t sec_attr,
Harry Liebelafd1ec72014-04-01 19:19:22 +0100175 uint32_t ns_device_access)
176{
177 uint64_t max_addr;
178
179 assert(controller != NULL);
180
181 /* Do range checks on filters and regions. */
182 assert(((filters >> controller->num_filters) == 0) &&
183 (region < controller->num_regions));
184
185 /*
186 * Do address range check based on TZC configuration. A 64bit address is
187 * the max and expected case.
188 */
189 max_addr = UINT64_MAX >> (64 - controller->addr_width);
190 if ((region_top > max_addr) || (region_base >= region_top))
191 assert(0);
192
193 /* region_base and (region_top + 1) must be 4KB aligned */
194 assert(((region_base | (region_top + 1)) & (4096 - 1)) == 0);
195
196 assert(sec_attr <= TZC_REGION_S_RDWR);
197
198 /*
199 * Inputs look ok, start programming registers.
200 * All the address registers are 32 bits wide and have a LOW and HIGH
201 * component used to construct a up to a 64bit address.
202 */
203 tzc_write_region_base_low(controller->base, region, (uint32_t)(region_base));
204 tzc_write_region_base_high(controller->base, region, (uint32_t)(region_base >> 32));
205
206 tzc_write_region_top_low(controller->base, region, (uint32_t)(region_top));
207 tzc_write_region_top_high(controller->base, region, (uint32_t)(region_top >> 32));
208
209 /* Assign the region to a filter and set secure attributes */
210 tzc_write_region_attributes(controller->base, region,
211 (sec_attr << REGION_ATTRIBUTES_SEC_SHIFT) | filters);
212
213 /*
214 * Specify which non-secure devices have permission to access this
215 * region.
216 */
217 tzc_write_region_id_access(controller->base, region, ns_device_access);
218}
219
220
Dan Handleye2712bc2014-04-10 15:37:22 +0100221void tzc_set_action(const tzc_instance_t *controller, tzc_action_t action)
Harry Liebelafd1ec72014-04-01 19:19:22 +0100222{
223 assert(controller != NULL);
224
225 /*
226 * - Currently no handler is provided to trap an error via interrupt
227 * or exception.
228 * - The interrupt action has not been tested.
229 */
230 tzc_write_action(controller->base, action);
231}
232
233
Dan Handleye2712bc2014-04-10 15:37:22 +0100234void tzc_enable_filters(const tzc_instance_t *controller)
Harry Liebelafd1ec72014-04-01 19:19:22 +0100235{
236 uint32_t state;
237 uint32_t filter;
238
239 assert(controller != NULL);
240
241 for (filter = 0; filter < controller->num_filters; filter++) {
242 state = tzc_get_gate_keeper(controller->base, filter);
243 if (state) {
Juan Castillof558cac2014-06-05 09:45:36 +0100244 /* The TZC filter is already configured. Changing the
245 * programmer's view in an active system can cause
246 * unpredictable behavior therefore panic for now rather
247 * than try to determine whether this is safe in this
248 * instance. See:
249 * http://infocenter.arm.com/help/index.jsp?\
250 * topic=/com.arm.doc.ddi0504c/CJHHECBF.html */
Harry Liebelafd1ec72014-04-01 19:19:22 +0100251 ERROR("TZC : Filter %d Gatekeeper already enabled.\n",
252 filter);
253 panic();
254 }
255 tzc_set_gate_keeper(controller->base, filter, 1);
256 }
257}
258
259
Dan Handleye2712bc2014-04-10 15:37:22 +0100260void tzc_disable_filters(const tzc_instance_t *controller)
Harry Liebelafd1ec72014-04-01 19:19:22 +0100261{
262 uint32_t filter;
263
264 assert(controller != NULL);
265
266 /*
267 * We don't do the same state check as above as the Gatekeepers are
268 * disabled after reset.
269 */
270 for (filter = 0; filter < controller->num_filters; filter++)
271 tzc_set_gate_keeper(controller->base, filter, 0);
272}