| Soby Mathew | 748be1d | 2016-05-05 14:10:46 +0100 | [diff] [blame] | 1 | /* |
| Antonio Nino Diaz | 7c65c1e | 2017-04-20 09:58:28 +0100 | [diff] [blame] | 2 | * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved. |
| Soby Mathew | 748be1d | 2016-05-05 14:10:46 +0100 | [diff] [blame] | 3 | * |
| dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | * SPDX-License-Identifier: BSD-3-Clause |
| Soby Mathew | 748be1d | 2016-05-05 14:10:46 +0100 | [diff] [blame] | 5 | */ |
| 6 | #include <aem_generic.h> |
| 7 | #include <arch.h> |
| 8 | #include <asm_macros.S> |
| 9 | #include <assert_macros.S> |
| 10 | #include <cpu_macros.S> |
| 11 | |
| 12 | func aem_generic_core_pwr_dwn |
| 13 | /* Assert if cache is enabled */ |
| Antonio Nino Diaz | 7c65c1e | 2017-04-20 09:58:28 +0100 | [diff] [blame] | 14 | #if ENABLE_ASSERTIONS |
| Soby Mathew | 748be1d | 2016-05-05 14:10:46 +0100 | [diff] [blame] | 15 | ldcopr r0, SCTLR |
| 16 | tst r0, #SCTLR_C_BIT |
| 17 | ASM_ASSERT(eq) |
| 18 | #endif |
| 19 | /* --------------------------------------------- |
| 20 | * Flush L1 cache to PoU. |
| 21 | * --------------------------------------------- |
| 22 | */ |
| 23 | mov r0, #DC_OP_CISW |
| 24 | b dcsw_op_louis |
| 25 | endfunc aem_generic_core_pwr_dwn |
| 26 | |
| 27 | |
| 28 | func aem_generic_cluster_pwr_dwn |
| 29 | /* Assert if cache is enabled */ |
| Antonio Nino Diaz | 7c65c1e | 2017-04-20 09:58:28 +0100 | [diff] [blame] | 30 | #if ENABLE_ASSERTIONS |
| Soby Mathew | 748be1d | 2016-05-05 14:10:46 +0100 | [diff] [blame] | 31 | ldcopr r0, SCTLR |
| 32 | tst r0, #SCTLR_C_BIT |
| 33 | ASM_ASSERT(eq) |
| 34 | #endif |
| 35 | /* --------------------------------------------- |
| 36 | * Flush L1 and L2 caches to PoC. |
| 37 | * --------------------------------------------- |
| 38 | */ |
| 39 | mov r0, #DC_OP_CISW |
| 40 | b dcsw_op_all |
| 41 | endfunc aem_generic_cluster_pwr_dwn |
| 42 | |
| 43 | /* cpu_ops for Base AEM FVP */ |
| Jeenu Viswambharan | ee5eb80 | 2016-11-18 12:58:28 +0000 | [diff] [blame] | 44 | declare_cpu_ops aem_generic, BASE_AEM_MIDR, CPU_NO_RESET_FUNC, \ |
| 45 | aem_generic_core_pwr_dwn, \ |
| 46 | aem_generic_cluster_pwr_dwn |