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Soby Mathewec8ac1c2016-05-05 14:32:05 +01001#
Dimitris Papastamos0a4cded2018-01-02 11:37:02 +00002# Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
Soby Mathewec8ac1c2016-05-05 14:32:05 +01003#
dp-armfa3cf0b2017-05-03 09:38:09 +01004# SPDX-License-Identifier: BSD-3-Clause
Soby Mathewec8ac1c2016-05-05 14:32:05 +01005#
6
7ifneq (${ARCH}, aarch32)
8 $(error SP_MIN is only supported on AArch32 platforms)
9endif
10
11include lib/psci/psci_lib.mk
12
13INCLUDES += -Iinclude/bl32/sp_min
14
15BL32_SOURCES += bl32/sp_min/sp_min_main.c \
16 bl32/sp_min/aarch32/entrypoint.S \
17 common/runtime_svc.c \
Soby Mathew6d07e672018-03-01 10:53:33 +000018 plat/common/aarch32/plat_sp_min_common.c\
Soby Mathewec8ac1c2016-05-05 14:32:05 +010019 services/std_svc/std_svc_setup.c \
20 ${PSCI_LIB_SOURCES}
21
22ifeq (${ENABLE_PMF}, 1)
23BL32_SOURCES += lib/pmf/pmf_main.c
24endif
25
Dimitris Papastamosdda48b02017-10-17 14:03:14 +010026ifeq (${ENABLE_AMU}, 1)
Joel Hutton2691bc62017-12-12 15:47:55 +000027BL32_SOURCES += lib/extensions/amu/aarch32/amu.c\
28 lib/extensions/amu/aarch32/amu_helpers.S
Dimitris Papastamosdda48b02017-10-17 14:03:14 +010029endif
30
Dimitris Papastamos0a4cded2018-01-02 11:37:02 +000031ifeq (${WORKAROUND_CVE_2017_5715},1)
32BL32_SOURCES += bl32/sp_min/workaround_cve_2017_5715_bpiall.S \
33 bl32/sp_min/workaround_cve_2017_5715_icache_inv.S
34endif
35
Soby Mathewec8ac1c2016-05-05 14:32:05 +010036BL32_LINKERFILE := bl32/sp_min/sp_min.ld.S
37
38# Include the platform-specific SP_MIN Makefile
39# If no platform-specific SP_MIN Makefile exists, it means SP_MIN is not supported
40# on this platform.
41SP_MIN_PLAT_MAKEFILE := $(wildcard ${PLAT_DIR}/sp_min/sp_min-${PLAT}.mk)
42ifeq (,${SP_MIN_PLAT_MAKEFILE})
43 $(error SP_MIN is not supported on platform ${PLAT})
44else
45 include ${SP_MIN_PLAT_MAKEFILE}
46endif
47
Yatharth Kochar1c16a4c2016-06-30 14:50:58 +010048RESET_TO_SP_MIN := 0
Soby Mathewec8ac1c2016-05-05 14:32:05 +010049$(eval $(call add_define,RESET_TO_SP_MIN))
50$(eval $(call assert_boolean,RESET_TO_SP_MIN))
Etienne Carrieredc0fea72017-08-09 15:48:53 +020051
52# Flag to allow SP_MIN to handle FIQ interrupts in monitor mode. The platform
53# port is free to override this value. It is default disabled.
54SP_MIN_WITH_SECURE_FIQ ?= 0
55$(eval $(call add_define,SP_MIN_WITH_SECURE_FIQ))
56$(eval $(call assert_boolean,SP_MIN_WITH_SECURE_FIQ))