blob: 95e1f615884142090fefbbd0e502c415012c98e5 [file] [log] [blame]
Marek Vasut8ed5c5c2019-02-12 00:09:46 +01001/*
Toshiyuki Ogasahara77626582020-11-30 20:39:21 +09002 * Copyright (c) 2019-2021, Renesas Electronics Corporation. All rights reserved.
Marek Vasut8ed5c5c2019-02-12 00:09:46 +01003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <assert.h>
8
9#include <arch_helpers.h>
10#include <drivers/console.h>
11#include <lib/xlat_tables/xlat_mmu_helpers.h>
12#include <plat/common/platform.h>
13
14#include <lib/mmio.h>
Toshiyuki Ogasahara77626582020-11-30 20:39:21 +090015#include <cpg_registers.h>
Marek Vasut8ed5c5c2019-02-12 00:09:46 +010016
Marek Vasut8ed5c5c2019-02-12 00:09:46 +010017#define MSTP318 (1 << 18)
18#define MSTP319 (1 << 19)
19#define PMSR 0x5c
Justin Chadwelle454beb2019-07-03 14:11:06 +010020#define PMSR_L1FAEG (1U << 31)
Marek Vasut8ed5c5c2019-02-12 00:09:46 +010021#define PMSR_PMEL1RX (1 << 23)
22#define PMCTLR 0x60
Justin Chadwelle454beb2019-07-03 14:11:06 +010023#define PMSR_L1IATN (1U << 31)
Marek Vasut8ed5c5c2019-02-12 00:09:46 +010024
25static int rcar_pcie_fixup(unsigned int controller)
26{
27 uint32_t rcar_pcie_base[] = { 0xfe011000, 0xee811000 };
28 uint32_t addr = rcar_pcie_base[controller];
29 uint32_t cpg, pmsr;
30 int ret = 0;
31
32 /* Test if PCIECx is enabled */
Toshiyuki Ogasahara77626582020-11-30 20:39:21 +090033 cpg = mmio_read_32(CPG_MSTPSR3);
Marek Vasut8ed5c5c2019-02-12 00:09:46 +010034 if (cpg & (MSTP318 << !controller))
35 return ret;
36
37 pmsr = mmio_read_32(addr + PMSR);
38
39 if ((pmsr & PMSR_PMEL1RX) && ((pmsr & 0x70000) != 0x30000)) {
40 /* Fix applicable */
41 mmio_write_32(addr + PMCTLR, PMSR_L1IATN);
42 while (!(mmio_read_32(addr + PMSR) & PMSR_L1FAEG))
43 ;
44 mmio_write_32(addr + PMSR, PMSR_L1FAEG | PMSR_PMEL1RX);
45 ret = 1;
46 }
47
48 return ret;
49}
50
51/* RAS functions common to AArch64 ARM platforms */
52void plat_ea_handler(unsigned int ea_reason, uint64_t syndrome, void *cookie,
53 void *handle, uint64_t flags)
54{
55 unsigned int fixed = 0;
56
57 fixed |= rcar_pcie_fixup(0);
58 fixed |= rcar_pcie_fixup(1);
59
60 if (fixed)
61 return;
62
63 ERROR("Unhandled External Abort received on 0x%lx at EL3!\n",
64 read_mpidr_el1());
65 ERROR(" exception reason=%u syndrome=0x%llx\n", ea_reason, syndrome);
66
67 panic();
68}
Marek Vasut0aa268e2019-05-18 19:29:16 +020069
70#include <drivers/renesas/rcar/console/console.h>
71
Andre Przywara52fb0492020-01-25 00:58:35 +000072static console_t rcar_boot_console;
73static console_t rcar_runtime_console;
Marek Vasut0aa268e2019-05-18 19:29:16 +020074
75void rcar_console_boot_init(void)
76{
77 int ret;
78
79 ret = console_rcar_register(0, 0, 0, &rcar_boot_console);
80 if (!ret)
81 panic();
82
Andre Przywara52fb0492020-01-25 00:58:35 +000083 console_set_scope(&rcar_boot_console, CONSOLE_FLAG_BOOT);
Marek Vasut0aa268e2019-05-18 19:29:16 +020084}
85
86void rcar_console_boot_end(void)
87{
88}
89
90void rcar_console_runtime_init(void)
91{
92 int ret;
93
94 ret = console_rcar_register(1, 0, 0, &rcar_runtime_console);
95 if (!ret)
96 panic();
97
Andre Przywara52fb0492020-01-25 00:58:35 +000098 console_set_scope(&rcar_boot_console, CONSOLE_FLAG_RUNTIME);
Marek Vasut0aa268e2019-05-18 19:29:16 +020099}
100
101void rcar_console_runtime_end(void)
102{
103}