blob: 960d69842a8c3bdf84b6ad7d891e7edc084b04e0 [file] [log] [blame]
Manish V Badarkhef356f7e2021-06-29 11:44:20 +01001/*
2 * Copyright (c) 2021, Arm Limited. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <stdbool.h>
8
9#include <arch.h>
10#include <arch_helpers.h>
11#include <lib/extensions/sys_reg_trace.h>
12
13static bool sys_reg_trace_supported(void)
14{
15 uint64_t features;
16
17 features = read_id_aa64dfr0_el1() >> ID_AA64DFR0_TRACEVER_SHIFT;
18 return ((features & ID_AA64DFR0_TRACEVER_MASK) ==
19 ID_AA64DFR0_TRACEVER_SUPPORTED);
20}
21
22void sys_reg_trace_enable(cpu_context_t *ctx)
23{
24 uint64_t val;
25
26 if (sys_reg_trace_supported()) {
27 /* Retrieve CPTR_EL3 value from the given context 'ctx',
28 * and update CPTR_EL3.TTA bit to 0.
29 * This function is called while switching context to NS to
30 * allow system trace register access to NS-EL2 and NS-EL1
31 * when NS-EL2 is implemented but not used.
32 */
33 val = read_ctx_reg(get_el3state_ctx(ctx), CTX_CPTR_EL3);
34 val &= ~TTA_BIT;
35 write_ctx_reg(get_el3state_ctx(ctx), CTX_CPTR_EL3, val);
36 }
37}