| Sheetal Tigadoli | 2a96dc2 | 2019-12-18 12:01:01 +0530 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2015 - 2020, Broadcom |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #ifndef DMU_H |
| 8 | #define DMU_H |
| 9 | |
| 10 | /* Clock field should be 2 bits only */ |
| 11 | #define CLKCONFIG_MASK 0x3 |
| 12 | |
| 13 | /* argument */ |
| 14 | struct DmuBlockEnable { |
| 15 | uint32_t sotp:1; |
| 16 | uint32_t pka_rng:1; |
| 17 | uint32_t crypto:1; |
| 18 | uint32_t spl:1; |
| 19 | uint32_t cdru_vgm:1; |
| 20 | uint32_t apbs_s0_idm:1; |
| 21 | uint32_t smau_s0_idm:1; |
| 22 | }; |
| 23 | |
| 24 | /* prototype */ |
| 25 | uint32_t bcm_dmu_block_enable(struct DmuBlockEnable dbe); |
| 26 | uint32_t bcm_dmu_block_disable(struct DmuBlockEnable dbe); |
| 27 | uint32_t bcm_set_ihost_pll_freq(uint32_t cluster_num, int ihost_pll_freq_sel); |
| 28 | uint32_t bcm_get_ihost_pll_freq(uint32_t cluster_num); |
| 29 | |
| 30 | #define PLL_FREQ_BYPASS 0x0 |
| 31 | #define PLL_FREQ_FULL 0x1 |
| 32 | #define PLL_FREQ_HALF 0x2 |
| 33 | #define PLL_FREQ_QRTR 0x3 |
| 34 | |
| 35 | #endif |