blob: 42f38180e72c0ccc3acf945033d46e29e2cdf237 [file] [log] [blame]
Boyan Karatotev9ac73a42023-11-14 09:38:08 +00001/*
2 * Copyright (c) 2023-2024, Arm Limited. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7/ {
8 rtc@1c170000 {
9 compatible = "arm,pl031", "arm,primecell";
10 reg = <0x0 0x1C170000 0x0 0x1000>;
11 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
12 clocks = <&soc_refclk>;
13 clock-names = "apb_pclk";
14 };
15
16 kmi@1c060000 {
17 compatible = "arm,pl050", "arm,primecell";
18 reg = <0x0 0x001c060000 0x0 0x1000>;
19 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
20 clocks = <&bp_clock24mhz>, <&bp_clock24mhz>;
21 clock-names = "KMIREFCLK", "apb_pclk";
22 };
23
24 kmi@1c070000 {
25 compatible = "arm,pl050", "arm,primecell";
26 reg = <0x0 0x001c070000 0x0 0x1000>;
27 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
28 clocks = <&bp_clock24mhz>, <&bp_clock24mhz>;
29 clock-names = "KMIREFCLK", "apb_pclk";
30 };
31
32 virtio_block@1c130000 {
33 compatible = "virtio,mmio";
34 reg = <0x0 0x1c130000 0x0 0x200>;
35 /* spec lists this wrong */
36 interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>;
37 };
38};