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Varun Wadekar3d4e6a52015-03-13 14:01:03 +05301/*
2 * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
3 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Varun Wadekar3d4e6a52015-03-13 14:01:03 +05305 */
6
7#ifndef __TLKD_PRIVATE_H__
8#define __TLKD_PRIVATE_H__
9
10#include <arch.h>
11#include <context.h>
12#include <interrupt_mgmt.h>
13#include <platform_def.h>
14#include <psci.h>
15
16/*
17 * This flag is used by the TLKD to determine if the SP is servicing a standard
18 * SMC request prior to programming the next entry into the SP e.g. if SP
19 * execution is preempted by a non-secure interrupt and handed control to the
20 * normal world. If another request which is distinct from what the SP was
21 * previously doing arrives, then this flag will be help the TLKD to either
22 * reject the new request or service it while ensuring that the previous context
23 * is not corrupted.
24 */
25#define STD_SMC_ACTIVE_FLAG_SHIFT 2
26#define STD_SMC_ACTIVE_FLAG_MASK 1
27#define get_std_smc_active_flag(state) (((state) >> STD_SMC_ACTIVE_FLAG_SHIFT) \
28 & STD_SMC_ACTIVE_FLAG_MASK)
29#define set_std_smc_active_flag(state) ((state) |= \
30 (1 << STD_SMC_ACTIVE_FLAG_SHIFT))
31#define clr_std_smc_active_flag(state) ((state) &= \
32 ~(STD_SMC_ACTIVE_FLAG_MASK \
33 << STD_SMC_ACTIVE_FLAG_SHIFT))
34
35/*******************************************************************************
Varun Wadekar97625e32015-03-13 14:59:03 +053036 * Translate virtual address received from the NS world
37 ******************************************************************************/
38#define TLK_TRANSLATE_NS_VADDR 4
39
40/*******************************************************************************
Varun Wadekar3d4e6a52015-03-13 14:01:03 +053041 * Secure Payload execution state information i.e. aarch32 or aarch64
42 ******************************************************************************/
43#define SP_AARCH32 MODE_RW_32
44#define SP_AARCH64 MODE_RW_64
45
46/*******************************************************************************
47 * Number of cpus that the present on this platform. TODO: Rely on a topology
48 * tree to determine this in the future to avoid assumptions about mpidr
49 * allocation
50 ******************************************************************************/
51#define TLKD_CORE_COUNT PLATFORM_CORE_COUNT
52
53/*******************************************************************************
54 * Constants that allow assembler code to preserve callee-saved registers of the
55 * C runtime context while performing a security state switch.
56 ******************************************************************************/
57#define TLKD_C_RT_CTX_X19 0x0
58#define TLKD_C_RT_CTX_X20 0x8
59#define TLKD_C_RT_CTX_X21 0x10
60#define TLKD_C_RT_CTX_X22 0x18
61#define TLKD_C_RT_CTX_X23 0x20
62#define TLKD_C_RT_CTX_X24 0x28
63#define TLKD_C_RT_CTX_X25 0x30
64#define TLKD_C_RT_CTX_X26 0x38
65#define TLKD_C_RT_CTX_X27 0x40
66#define TLKD_C_RT_CTX_X28 0x48
67#define TLKD_C_RT_CTX_X29 0x50
68#define TLKD_C_RT_CTX_X30 0x58
69#define TLKD_C_RT_CTX_SIZE 0x60
70#define TLKD_C_RT_CTX_ENTRIES (TLKD_C_RT_CTX_SIZE >> DWORD_SHIFT)
71
72#ifndef __ASSEMBLY__
73
74#include <cassert.h>
75#include <stdint.h>
76
77/* AArch64 callee saved general purpose register context structure. */
78DEFINE_REG_STRUCT(c_rt_regs, TLKD_C_RT_CTX_ENTRIES);
79
80/*
81 * Compile time assertion to ensure that both the compiler and linker
82 * have the same double word aligned view of the size of the C runtime
83 * register context.
84 */
85CASSERT(TLKD_C_RT_CTX_SIZE == sizeof(c_rt_regs_t), \
86 assert_tlkd_c_rt_regs_size_mismatch);
87
88/*******************************************************************************
89 * Structure which helps the SPD to maintain the per-cpu state of the SP.
90 * 'state' - collection of flags to track SP state e.g. on/off
91 * 'mpidr' - mpidr to associate a context with a cpu
92 * 'c_rt_ctx' - stack address to restore C runtime context from after
93 * returning from a synchronous entry into the SP.
94 * 'cpu_ctx' - space to maintain SP architectural state
95 * 'saved_tsp_args' - space to store arguments for TSP arithmetic operations
96 * which will queried using the TSP_GET_ARGS SMC by TSP.
97 ******************************************************************************/
98typedef struct tlk_context {
99 uint32_t state;
100 uint64_t mpidr;
101 uint64_t c_rt_ctx;
102 cpu_context_t cpu_ctx;
103} tlk_context_t;
104
105/*******************************************************************************
106 * Function & Data prototypes
107 ******************************************************************************/
Varun Wadekar97625e32015-03-13 14:59:03 +0530108uint64_t tlkd_va_translate(uintptr_t va, int type);
Varun Wadekar3d4e6a52015-03-13 14:01:03 +0530109uint64_t tlkd_enter_sp(uint64_t *c_rt_ctx);
110void __dead2 tlkd_exit_sp(uint64_t c_rt_ctx, uint64_t ret);
111uint64_t tlkd_synchronous_sp_entry(tlk_context_t *tlk_ctx);
112void __dead2 tlkd_synchronous_sp_exit(tlk_context_t *tlk_ctx,
113 uint64_t ret);
114void tlkd_init_tlk_ep_state(struct entry_point_info *tlk_entry_point,
115 uint32_t rw,
116 uint64_t pc,
117 tlk_context_t *tlk_ctx);
118
119#endif /*__ASSEMBLY__*/
120
121#endif /* __TLKD_PRIVATE_H__ */