Deepak Pandey | 9cbacf6 | 2018-08-08 10:32:51 +0530 | [diff] [blame] | 1 | # |
sah01 | 6ec01e8 | 2021-06-06 14:38:01 +0530 | [diff] [blame] | 2 | # Copyright (c) 2018-2022, Arm Limited. All rights reserved. |
Deepak Pandey | 9cbacf6 | 2018-08-08 10:32:51 +0530 | [diff] [blame] | 3 | # |
| 4 | # SPDX-License-Identifier: BSD-3-Clause |
| 5 | # |
| 6 | |
| 7 | |
| 8 | N1SDP_BASE := plat/arm/board/n1sdp |
| 9 | |
| 10 | INTERCONNECT_SOURCES := ${N1SDP_BASE}/n1sdp_interconnect.c |
| 11 | |
| 12 | PLAT_INCLUDES := -I${N1SDP_BASE}/include |
| 13 | |
| 14 | |
John Tsichritzis | 56369c1 | 2019-02-19 13:49:06 +0000 | [diff] [blame] | 15 | N1SDP_CPU_SOURCES := lib/cpus/aarch64/neoverse_n1.S |
Deepak Pandey | 9cbacf6 | 2018-08-08 10:32:51 +0530 | [diff] [blame] | 16 | |
Alexei Fedorov | 84f1b5d | 2020-03-23 18:45:17 +0000 | [diff] [blame] | 17 | # GIC-600 configuration |
Andre Przywara | e1cc130 | 2020-03-25 15:50:38 +0000 | [diff] [blame] | 18 | GICV3_SUPPORT_GIC600 := 1 |
Alexei Fedorov | 84f1b5d | 2020-03-23 18:45:17 +0000 | [diff] [blame] | 19 | GICV3_IMPL_GIC600_MULTICHIP := 1 |
Deepak Pandey | 9cbacf6 | 2018-08-08 10:32:51 +0530 | [diff] [blame] | 20 | |
Alexei Fedorov | 84f1b5d | 2020-03-23 18:45:17 +0000 | [diff] [blame] | 21 | # Include GICv3 driver files |
| 22 | include drivers/arm/gic/v3/gicv3.mk |
| 23 | |
| 24 | N1SDP_GIC_SOURCES := ${GICV3_SOURCES} \ |
Deepak Pandey | 9cbacf6 | 2018-08-08 10:32:51 +0530 | [diff] [blame] | 25 | plat/common/plat_gicv3.c \ |
| 26 | plat/arm/common/arm_gicv3.c \ |
Deepak Pandey | 9cbacf6 | 2018-08-08 10:32:51 +0530 | [diff] [blame] | 27 | |
| 28 | PLAT_BL_COMMON_SOURCES := ${N1SDP_BASE}/n1sdp_plat.c \ |
| 29 | ${N1SDP_BASE}/aarch64/n1sdp_helper.S |
| 30 | |
sah01 | 6ec01e8 | 2021-06-06 14:38:01 +0530 | [diff] [blame] | 31 | BL1_SOURCES := ${N1SDP_CPU_SOURCES} \ |
| 32 | ${INTERCONNECT_SOURCES} \ |
| 33 | ${N1SDP_BASE}/n1sdp_err.c \ |
| 34 | ${N1SDP_BASE}/n1sdp_trusted_boot.c \ |
| 35 | ${N1SDP_BASE}/n1sdp_bl1_setup.c \ |
| 36 | drivers/arm/sbsa/sbsa.c |
| 37 | |
| 38 | BL2_SOURCES := ${N1SDP_BASE}/n1sdp_security.c \ |
| 39 | ${N1SDP_BASE}/n1sdp_err.c \ |
| 40 | ${N1SDP_BASE}/n1sdp_trusted_boot.c \ |
| 41 | lib/utils/mem_region.c \ |
| 42 | ${N1SDP_BASE}/n1sdp_bl2_setup.c \ |
sahil | f1c8861 | 2022-03-15 14:11:43 +0530 | [diff] [blame] | 43 | ${N1SDP_BASE}/n1sdp_image_load.c \ |
sah01 | 6ec01e8 | 2021-06-06 14:38:01 +0530 | [diff] [blame] | 44 | drivers/arm/css/sds/sds.c |
Deepak Pandey | 9cbacf6 | 2018-08-08 10:32:51 +0530 | [diff] [blame] | 45 | |
| 46 | BL31_SOURCES := ${N1SDP_CPU_SOURCES} \ |
| 47 | ${INTERCONNECT_SOURCES} \ |
| 48 | ${N1SDP_GIC_SOURCES} \ |
sah01 | 6ec01e8 | 2021-06-06 14:38:01 +0530 | [diff] [blame] | 49 | ${N1SDP_BASE}/n1sdp_bl31_setup.c \ |
Deepak Pandey | 9cbacf6 | 2018-08-08 10:32:51 +0530 | [diff] [blame] | 50 | ${N1SDP_BASE}/n1sdp_topology.c \ |
Manoj Kumar | 69bebd8 | 2019-06-21 17:07:13 +0100 | [diff] [blame] | 51 | ${N1SDP_BASE}/n1sdp_security.c \ |
| 52 | drivers/arm/css/sds/sds.c |
Deepak Pandey | 9cbacf6 | 2018-08-08 10:32:51 +0530 | [diff] [blame] | 53 | |
Andre Przywara | c2db651 | 2020-07-06 11:19:41 +0530 | [diff] [blame] | 54 | FDT_SOURCES += fdts/${PLAT}-single-chip.dts \ |
sah01 | 6ec01e8 | 2021-06-06 14:38:01 +0530 | [diff] [blame] | 55 | fdts/${PLAT}-multi-chip.dts \ |
sahil | f1c8861 | 2022-03-15 14:11:43 +0530 | [diff] [blame] | 56 | ${N1SDP_BASE}/fdts/n1sdp_fw_config.dts \ |
| 57 | ${N1SDP_BASE}/fdts/n1sdp_tb_fw_config.dts \ |
| 58 | ${N1SDP_BASE}/fdts/n1sdp_nt_fw_config.dts |
sah01 | 6ec01e8 | 2021-06-06 14:38:01 +0530 | [diff] [blame] | 59 | |
| 60 | FW_CONFIG := ${BUILD_PLAT}/fdts/n1sdp_fw_config.dtb |
| 61 | TB_FW_CONFIG := ${BUILD_PLAT}/fdts/n1sdp_tb_fw_config.dtb |
sahil | f1c8861 | 2022-03-15 14:11:43 +0530 | [diff] [blame] | 62 | NT_FW_CONFIG := ${BUILD_PLAT}/fdts/n1sdp_nt_fw_config.dtb |
sah01 | 6ec01e8 | 2021-06-06 14:38:01 +0530 | [diff] [blame] | 63 | |
| 64 | # Add the FW_CONFIG to FIP and specify the same to certtool |
| 65 | $(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG})) |
| 66 | # Add the TB_FW_CONFIG to FIP and specify the same to certtool |
| 67 | $(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG})) |
sahil | f1c8861 | 2022-03-15 14:11:43 +0530 | [diff] [blame] | 68 | # Add the NT_FW_CONFIG to FIP and specify the same to certtool |
| 69 | $(eval $(call TOOL_ADD_PAYLOAD,${NT_FW_CONFIG},--nt-fw-config,${NT_FW_CONFIG})) |
sah01 | 6ec01e8 | 2021-06-06 14:38:01 +0530 | [diff] [blame] | 70 | |
Vishnu Banavath | 7cac3de | 2022-06-20 18:20:21 +0100 | [diff] [blame] | 71 | N1SDP_SPMC_MANIFEST_DTS := ${N1SDP_BASE}/fdts/${PLAT}_optee_spmc_manifest.dts |
| 72 | FDT_SOURCES += ${N1SDP_SPMC_MANIFEST_DTS} |
| 73 | N1SDP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_optee_spmc_manifest.dtb |
| 74 | |
| 75 | # Add the TOS_FW_CONFIG to FIP and specify the same to certtool |
| 76 | $(eval $(call TOOL_ADD_PAYLOAD,${N1SDP_TOS_FW_CONFIG},--tos-fw-config,${N1SDP_TOS_FW_CONFIG})) |
| 77 | |
sah01 | 6ec01e8 | 2021-06-06 14:38:01 +0530 | [diff] [blame] | 78 | # Setting to 0 as no NVCTR in N1SDP |
| 79 | N1SDP_FW_NVCTR_VAL := 0 |
| 80 | TFW_NVCTR_VAL := ${N1SDP_FW_NVCTR_VAL} |
| 81 | NTFW_NVCTR_VAL := ${N1SDP_FW_NVCTR_VAL} |
| 82 | |
| 83 | # Add N1SDP_FW_NVCTR_VAL |
| 84 | $(eval $(call add_define,N1SDP_FW_NVCTR_VAL)) |
Deepak Pandey | 9cbacf6 | 2018-08-08 10:32:51 +0530 | [diff] [blame] | 85 | |
| 86 | # TF-A not required to load the SCP Images |
| 87 | override CSS_LOAD_SCP_IMAGES := 0 |
| 88 | |
Deepak Pandey | 9cbacf6 | 2018-08-08 10:32:51 +0530 | [diff] [blame] | 89 | override NEED_BL2U := no |
| 90 | |
Deepak Pandey | 9cbacf6 | 2018-08-08 10:32:51 +0530 | [diff] [blame] | 91 | # 32 bit mode not supported |
| 92 | override CTX_INCLUDE_AARCH32_REGS := 0 |
| 93 | |
| 94 | override ARM_PLAT_MT := 1 |
| 95 | |
| 96 | # Select SCMI/SDS drivers instead of SCPI/BOM driver for communicating with the |
| 97 | # SCP during power management operations and for SCP RAM Firmware transfer. |
| 98 | CSS_USE_SCMI_SDS_DRIVER := 1 |
| 99 | |
| 100 | # System coherency is managed in hardware |
| 101 | HW_ASSISTED_COHERENCY := 1 |
| 102 | |
| 103 | # When building for systems with hardware-assisted coherency, there's no need to |
| 104 | # use USE_COHERENT_MEM. Require that USE_COHERENT_MEM must be set to 0 too. |
| 105 | USE_COHERENT_MEM := 0 |
Chandni Cherukuri | b912087 | 2020-03-05 11:49:57 +0530 | [diff] [blame] | 106 | |
| 107 | # Enable the flag since N1SDP has a system level cache |
Javier Almansa Sobrino | 9faad3c | 2020-10-23 13:22:07 +0100 | [diff] [blame] | 108 | NEOVERSE_Nx_EXTERNAL_LLC := 1 |
Deepak Pandey | 9cbacf6 | 2018-08-08 10:32:51 +0530 | [diff] [blame] | 109 | include plat/arm/common/arm_common.mk |
| 110 | include plat/arm/css/common/css_common.mk |
Deepak Pandey | 9cbacf6 | 2018-08-08 10:32:51 +0530 | [diff] [blame] | 111 | include plat/arm/board/common/board_common.mk |