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Andre Przywarafa914d82022-11-21 17:04:10 +00001/*
2 * Copyright (c) 2022, ARM Limited. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 *
6 * Dispatch synchronous system register traps from lower ELs.
7 */
8
9#include <bl31/sync_handle.h>
10#include <context.h>
11
12int handle_sysreg_trap(uint64_t esr_el3, cpu_context_t *ctx)
13{
14 switch (esr_el3 & ISS_SYSREG_OPCODE_MASK) {
Andre Przywarabdc76f12022-11-21 17:07:25 +000015#if ENABLE_FEAT_RNG_TRAP
16 case ISS_SYSREG_OPCODE_RNDR:
17 case ISS_SYSREG_OPCODE_RNDRRS:
18 return plat_handle_rng_trap(esr_el3, ctx);
19#endif
Andre Przywarafa914d82022-11-21 17:04:10 +000020 default:
21 return TRAP_RET_UNHANDLED;
22 }
23}