blob: 434e08a0b2c49b6461ef646fa03750f1f8bdf86b [file] [log] [blame]
Amit Nagal055796f2024-06-05 12:32:38 +05301/*
2 * Copyright (c) 2018, Arm Limited and Contributors. All rights reserved.
3 * Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved.
4 * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8
9#include <common/debug.h>
10#include <plat/common/platform.h>
11#include <platform_def.h>
12
13#include <plat_private.h>
14
15static const uint8_t plat_power_domain_tree_desc[] = {
16 /* Number of root nodes */
17 1,
18 /* Number of clusters */
19 PLATFORM_CLUSTER_COUNT,
20 /* Number of children for the first cluster node */
21 PLATFORM_CORE_COUNT_PER_CLUSTER,
22 /* Number of children for the second cluster node */
23 PLATFORM_CORE_COUNT_PER_CLUSTER,
24 /* Number of children for the third cluster node */
25 PLATFORM_CORE_COUNT_PER_CLUSTER,
26 /* Number of children for the fourth cluster node */
27 PLATFORM_CORE_COUNT_PER_CLUSTER,
28};
29
30const uint8_t *plat_get_power_domain_tree_desc(void)
31{
32 return plat_power_domain_tree_desc;
33}
34
35/*******************************************************************************
36 * This function implements a part of the critical interface between the psci
37 * generic layer and the platform that allows the former to query the platform
38 * to convert an MPIDR to a unique linear index. An error code (-1) is returned
39 * in case the MPIDR is invalid.
40 ******************************************************************************/
41int32_t plat_core_pos_by_mpidr(u_register_t mpidr)
42{
43 uint32_t cluster_id, cpu_id;
Maheedhar Bollapalli120bdd52024-10-29 03:53:19 +000044 int32_t ret = 0;
Amit Nagal055796f2024-06-05 12:32:38 +053045
46 mpidr &= MPIDR_AFFINITY_MASK;
47
48 cluster_id = MPIDR_AFFLVL2_VAL(mpidr);
49 cpu_id = MPIDR_AFFLVL1_VAL(mpidr);
50
51 if (cluster_id >= PLATFORM_CLUSTER_COUNT) {
Maheedhar Bollapalli120bdd52024-10-29 03:53:19 +000052 ret = E_INVALID_CLUSTER_COUNT;
53 goto exit_label;
Amit Nagal055796f2024-06-05 12:32:38 +053054 }
55
56 /*
57 * Validate cpu_id by checking whether it represents a CPU in
58 * one of the two clusters present on the platform.
59 */
60 if (cpu_id >= PLATFORM_CORE_COUNT_PER_CLUSTER) {
Maheedhar Bollapalli120bdd52024-10-29 03:53:19 +000061 ret = E_INVALID_CORE_COUNT;
62 } else {
63 ret = (cpu_id + (cluster_id * PLATFORM_CORE_COUNT_PER_CLUSTER));
Amit Nagal055796f2024-06-05 12:32:38 +053064 }
65
Maheedhar Bollapalli120bdd52024-10-29 03:53:19 +000066exit_label:
67 return ret;
Amit Nagal055796f2024-06-05 12:32:38 +053068}